Patent EP0313031A2 successfully refreshed from Google Patents.
EP0313031A2
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EP
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CCD video camera
Assignee: Sony Corp
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Filing: 1988-10-19
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Granted: —
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Expires: 2008-10-19
Abstract
Abstract An output signal processing circuit for a CCD register, for example a horizontal output register of a CCD imager is provided. The CCD register includes an output precharge circuit with a capacitance, the voltage across the capacitance is supplied to an output terminal of the CCD register and has first, second and third durations repeatedly. The first duration is a precharge duration, the second duration is a reference duration and the third duraiton is a signal duration. The output signal processing circuit includes a clamp circuit(3) for clamping the output signal at the output terminal of the CCD in such a manner that the voltage of the reference duration becomes a stable clamp voltage, clip circuit (8) for clipping the output signal of the clamp circuit such that the voltage of the precharge duration is clipped to a clip level, and a low-pass filter (11)suppliedwith the output of the clip circuit(8) for generating the transferred signal.
Inventors
- 👤 Isamu Yamamoto
- 👤 Takashi Asaida
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 06:23
CPC Classifications
G; G11; G11C; G11C19/00; G11C19/28; G11C19/282; G11C19/285; G11C27/00; G11C27/02; G11C27/024; G11C27/04; H; H04; H04N; H04N25/00; H04N25/60; H04N25/61; H04N25/615; H04N25/616
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
194 words
An output signal processing circuit for a CCD having an output precharge circuit with capacitive means, the voltage across said capacitive means being supplied to an output terminal of said CCD and having first, second and third durations repeatedly, said first duration being a precharge duration when a precharge pulse produced at the same frequency as that of a CCD-driving clock signal is supplied to said output precharge circuit, said second duration being a reference duration when the voltage across said capacitive means is kept substantially at a reference voltage determined by said output precharge circuit, said third duration being a signal duration when said capacitive means is discharged to the level of a transferred signal, said output signal processing circuit comprising: clamp circuit means(3)for clamping the output signal at the output terminal of said CCD in such a manner that the voltage of said reference duration becomes a stable clamp voltage; clip circuit means(8)for clipping the output signal of said clamp circuit means so that the voltage of said precharge duration is clipped to a clip voltage; and low-pass filter means(11)suppliedwith the output of said clip circuit means for generating the transfer signal.
Claim 2
Dependent Claim
194 words
An output signal processing circuit for a CCD having an output precharge circuit with capacitive means, the voltage across said capacitive means being supplied to an output terminal of said CCD and having first, second and third durations repeatedly, said first duration being a precharge duration when a precharge pulse produced at the same frequency as that of a CCD-driving clock signal is supplied to said output precharge circuit, said second duration being a reference duration when the voltage across said capacitive means is kept substantially at a reference voltage determined by said output precharge circuit, said third duration being a signal duration when said capacitive means is discharged to the level of a transferred signal, said output signal processing circuit comprising: clamp circuit means(3)for clamping the output signal at the output terminal of said CCD in such a manner that the voltage of said reference duration becomes a stable clamp voltage; clip circuit means(8)for clipping the output signal of said clamp circuit means so that the voltage of said precharge duration is clipped to a clip voltage; and low-pass filter means(11)suppliedwith the output of said clip circuit means for generating the transfer signal.
Claim 3
Dependent Claim
20 words
An output signal processing circuit according to claim 1, wherein said clip voltage is substantially equal to said clamp voltage.
Claim 4
Dependent Claim
56 words
An output signal processing circuit according to claim 2, wherein said clip circuit means includes a level clip circuit, delay means(10)for delaying the output of said level clip circuit to generate at least one delayed output signal, and non-additive mixing circuit means(9)supplied with the output signal of said level clip circuit and the delayed output signal.
Claim 5
Dependent Claim
28 words
An output signal processing circuit according to claim 3, wherein the delay time caused by said delay means is less than one period of said CCD-driving clock signal.
Claim 6
Dependent Claim
178 words
A solid-state video camera comprising: a solid-state image pickup device of charge coupled type (CCD type) including photo-sensitive elements(102) arranged into a matrix, a plurality of vertical shift registers(103) for shifting charges generated in said photo-sensitive elements in a vertical direction, a plurality of horizontal shift registers (104) each shifting a charge from selected one of said vertical shift registers in a horizontal direction and generating a pulsed video information signal having a precharge duration, a reference duration and a signal duration repeatedly; output signal processing circuits connnected to said horizontal shift registers respectively and each including a clamp circuit(111) for clamping said pulsed video information signal in such a manner that the voltage of said reference duration becomes a stable clamp voltage; selective delay means(116-118) supplied with the outputs of the clamp circuits for selectively delaying the same so that the delays imparted to the individual outputs of said clamp circuits become different from one another; and non-additive mixing circuit means (119) supplied with the outputs of said selective delay means for generating the video information signal.
Claim 7
Dependent Claim
178 words
A solid-state video camera comprising: a solid-state image pickup device of charge coupled type (CCD type) including photo-sensitive elements(102) arranged into a matrix, a plurality of vertical shift registers(103) for shifting charges generated in said photo-sensitive elements in a vertical direction, a plurality of horizontal shift registers (104) each shifting a charge from selected one of said vertical shift registers in a horizontal direction and generating a pulsed video information signal having a precharge duration, a reference duration and a signal duration repeatedly; output signal processing circuits connnected to said horizontal shift registers respectively and each including a clamp circuit(111) for clamping said pulsed video information signal in such a manner that the voltage of said reference duration becomes a stable clamp voltage; selective delay means(116-118) supplied with the outputs of the clamp circuits for selectively delaying the same so that the delays imparted to the individual outputs of said clamp circuits become different from one another; and non-additive mixing circuit means (119) supplied with the outputs of said selective delay means for generating the video information signal.
Claim 8
Dependent Claim
78 words
A solid-state video camera according to claim 5, further comprising white level detecting means (132 b-d) for detecting the white levels of said pulsed video information signals, and gain controlled amplifier means (110 b-d) connected between the outputs of said horizontal shift registers and said clamp circuits respectively and controlled by the outputs of said white level detecting means in such a manner that the white levels of said pulsed video information signals become equal to one another.
Claim 9
Dependent Claim
36 words
A solid-state video camera according to claim 5, further comprising black level detecting means (113 b-d) for detecting the black levels of said pulsed video information signals and generating control outputs for controlling the clamp voltages.
References Cited (Backward Citations)
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