Abstract An interface method employed in a numerical controller to perform high-speed interface for signal interchange between the microprocessor of the numerical control unit and the microprocessor of a programmable machine controller. When an M-code is read from the numerical control program, the processor in the numerical control unit sends the M-code to a latch circuit in the interface circuit to store it in the latch circuit and inverts the logic level of a first status signal (MF) in a corresponding bit region of a first register in the interface circuit. Thereafter, when the controller finishes the sequence control related to the M-code, the processor in the controller inverts the logic level of a second status signal (MFIN) in a corresponding bit region of a second register in the interface circuit. When the first and second status signals coincide, the processor in the numerical control unit starts to process the next block in the numerical control program. Therefore, high-speed interfacing is possible.
An interfacing method in a numerical control apparatus, wherein signal transfer between a numerical control section for executing a numerical control program block by block and a programmable sequence control section is effected by means of an interface circuit disposed between these sections, said interfacing method comprising the steps of: (a) operating said numerical control section so that a particular command is delivered to said interface circuit and a logic level of a first predetermined status signal stored in a first storage means of said interface circuit is reversed, when said numerical control section reads said particular command from the numerical control program; (b) operating said sequence control section so that a logic level of a second status signal stored in a second storage means of said interface circuit is reversed, when said sequence control section completes sequence control associated with said particular signal; and (c) operating said numerical control section so that a processing associated with the next block of the numerical control program is started, when a predetermined relation is fulfilled between said first and second predetermined status signals.
Claim 2
Dependent Claim
181 words
An interfacing method in a numerical control apparatus, wherein signal transfer between a numerical control section for executing a numerical control program block by block and a programmable sequence control section is effected by means of an interface circuit disposed between these sections, said interfacing method comprising the steps of: (a) operating said numerical control section so that a particular command is delivered to said interface circuit and a logic level of a first predetermined status signal stored in a first storage means of said interface circuit is reversed, when said numerical control section reads said particular command from the numerical control program; (b) operating said sequence control section so that a logic level of a second status signal stored in a second storage means of said interface circuit is reversed, when said sequence control section completes sequence control associated with said particular signal; and (c) operating said numerical control section so that a processing associated with the next block of the numerical control program is started, when a predetermined relation is fulfilled between said first and second predetermined status signals.
Claim 3
Dependent Claim
66 words
An interfacing method in a numerical control apparatus according to claim 1, further comprising the step of setting said first and second predetermined status signals at the same logic level when the numerical control apparatus is in its initialized state; wherein the fulfillment of said predetermined relationship is determined when both of said status signals are the same in their logic level in said step (c).
Claim 4
Dependent Claim
59 words
An interfacing method in a numerical control apparatus according to claim 1, further comprising the step of setting said first and second predetermined status signals at logic levels different from each other; wherein the fulfillment of said predetermined relationship is determined when both of said status signals are different in logic levels from each other in said step (c).
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