Patent EP0306962A2 successfully refreshed from Google Patents.
EP0306962A2
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Single-chip microcomputer
Assignee: Hitachi Ltd
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Filing: 1988-09-08
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Granted: —
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Expires: 2008-09-08
Abstract
Abstract A logic circuit (6) built in a single-chip microprocessor is configured of electrically-programmable memory elements, and information is written into the memory elements from outside, whereby a logic circuit having any desired logical functions can be constructed. The writing operation of the memory elements can be executed in a short time, and a user can obtain the single-chip microprocessor having hardware of peculiar prescribed specifications, in a short period.
Inventors
- 👤 Terumi Sawase
- 👤 Kouki Noguchi
- 👤 Hideo Nakamura
- 👤 Yasushi Akao
- 👤 Shiro Baba
- 👤 Yoshimune Hagiwara
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 06:26
CPC Classifications
G; G06; G06F; G06F15/00; G06F9/00; G06F9/06; G06F9/22; G06F9/24; G06F15/76; G06F15/78; G06F15/7807; G06F15/7814
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
27 words
A single-chip microcomputer having a built-in CPU; characterized in that a logic circuit which includes nonvolatile semiconductor memory elements being electrically programmable is comprised in a chip.
Claim 2
Dependent Claim
27 words
A single-chip microcomputer having a built-in CPU; characterized in that a logic circuit which includes nonvolatile semiconductor memory elements being electrically programmable is comprised in a chip.
Claim 3
Dependent Claim
41 words
A single-chip microcomputer as defined in Claim 1, wherein said logic circuit has a programmable variable logical construction so that logical functions of said logic circuit may be established at will by electrically writing information into said nonvolatile semiconductor memory elements.
Claim 4
Dependent Claim
24 words
A single-chip microcomputer as defined in Claim 1, wherein said logic circuit controls data communications between said CPU and the exterior of said chip.
Claim 5
Dependent Claim
79 words
A single-chip microcomputer as defined in Claim 1, wherein: said logic circuit includes a logical product execution unit and a logical sum execution unit, and an address bus and a data bus which are connected to said CPU, I/O port means connected to said data bus, and input selection means connected between an input of said logical product execution unit of said logical circuit and said address bus as well as said data bus are comprised in said chip.
Claim 6
Dependent Claim
45 words
A single-chip microcomputer as defined in Claim 4, wherein output selection means to which an output of said logical sum execution unit of said logical circuit and said data bus as well as said I/O port means are connected is further comprised in said chip.
Claim 7
Dependent Claim
67 words
A single-chip microcomputer as defined in any of Claims 1, 2 and 3, wherein: an address bus and a data bus which are connected to said CPU, and a nonvolatile memory block which is connected to said address bus as well as said data bus are further comprised in said chip, and said logic circuit is connected to said address bus as well as said data bus.
Claim 8
Dependent Claim
20 words
A single-chip microcomputer as defined in Claim 6, wherein said nonvolatile memory block stores software of said single-chip microcomputer therein.
Claim 9
Dependent Claim
127 words
A single-chip microcomputer as defined in Claim 6, comprising in said chip: first signal transmission means connected between said address bus as well as said data bus and said CPU, second signal transmission means connected between said address bus as well as said data bus and said nonvolatile memory block, third signal transmission means connected between said address bus as well as said data bus and said logic circuit, fourth signal transmission means connected between the exterior of said chip and said address bus as well as said data bus, and control signal generating means for producing internal control signals so as to suspend signal transmission functions of any of said first to fourth signal transmission means in response to external control signals from outside said chip.
Claim 10
Dependent Claim
24 words
A single-chip microcomputer as defined in any of Claims 1, 2, 6 and 7, wherein said logic circuit constructs a micro-ROM in said CPU.
Claim 11
Dependent Claim
71 words
A semiconductor integrated circuit wherein a function circuit block which generates an output signal in response to an input signal is built in a chip; characterized in that a control circuit block for controlling an operation of said semiconductor integrated circuit associated with an operation of said function circuit block is further comprised in said chip, said control circuit block including a logic circuit which includes electrically-programmable nonvolatile semiconductor memory elements.
Claim 12
Dependent Claim
71 words
A semiconductor integrated circuit wherein a function circuit block which generates an output signal in response to an input signal is built in a chip; characterized in that a control circuit block for controlling an operation of said semiconductor integrated circuit associated with an operation of said function circuit block is further comprised in said chip, said control circuit block including a logic circuit which includes electrically-programmable nonvolatile semiconductor memory elements.
Claim 13
Dependent Claim
59 words
A semiconductor integrated circuit as defined in Claim 10, wherein said semiconductor integrated circuit and said function circuit block are a single-chip microcomputer and a CPU, respectively, said logic circuit having a programmable variable logical construction so that logical functions of said logic circuit may be established at will by electrically writing data into said nonvolatile semiconductor memory elements.
Claim 14
Dependent Claim
113 words
A data processing method which employs the single-chip microcomputer as defined in any of claims 1 to 9 or the semiconductor integrated circuit as defined in claim 10 or 11, characterized by: a first step of electrically writing data into the nonvolatile semiconductor memory element of said logic circuit, a second step of reading out the data electrically written at said first step and testing whether or not it has been normally written, and a third step of causing said microcomputer or said semiconductor integrated circuit to execute a data processing operation concerning the data electrically written at said first step, when a result of the test at said second step is normal.
References Cited (Backward Citations)
No citation records indexed.
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