Patent EP0306039A2 successfully refreshed from Google Patents.
EP0306039A2
Expired / Lapsed
EP
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Semiconductor device
Assignee: Toshiba Corp
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Filing: 1988-09-02
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Granted: —
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Expires: 2008-09-02
Abstract
Abstract In a GaAs semiconductor device, a portion of the drain region (22b) just under the drain electrode (25b) is shallower than the portion of the source region (22a) just under the source electrode (25a). With this improvement, the leak drain current creeping into the substrate is reduced while satisfactorily suppressing the short channel effect, which is inevitable in the prior art FET.
Inventors
- 👤 Souichi C/O Patent Division Imamura
- 👤 Munenari C/O Patent Division Kakumoto
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 23:40
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/161; H10D30/00; H10D30/01; H10D30/061; H10D30/0612; H10D30/0614; H10D30/0616; H10D30/60; H10D30/601; H10D30/603; H10D64/00; H10D64/60; H10D64/64
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
145 words
A semiconductor device of compound semiconductor type comprising: a channel layer (23, 43), and heavily impurity doped source and drain regions (22a, 42a, and 22b, 42b) formed in the surface region of a semiconductor substrate (21, 41), said channel being located between said source and drain regions, and said channel layer, and said source and drain regions being of a first conductivity type: and a gate electrode (24, 44), and source and drain electrodes (25a, 45a and 25b, 45b) formed on said semiconductor substrate (21, 41), said gate electrode cooperating with said channel layer (23, 43) to form a Schottky barrier, and said source and drain electrodes being in ohmic contact with said source and drain regions, characterized in that: a portion of said drain region just under said drain electrode is shallower than a portion of said source region just under said source electrode.
Claim 2
Dependent Claim
145 words
A semiconductor device of compound semiconductor type comprising: a channel layer (23, 43), and heavily impurity doped source and drain regions (22a, 42a, and 22b, 42b) formed in the surface region of a semiconductor substrate (21, 41), said channel being located between said source and drain regions, and said channel layer, and said source and drain regions being of a first conductivity type: and a gate electrode (24, 44), and source and drain electrodes (25a, 45a and 25b, 45b) formed on said semiconductor substrate (21, 41), said gate electrode cooperating with said channel layer (23, 43) to form a Schottky barrier, and said source and drain electrodes being in ohmic contact with said source and drain regions, characterized in that: a portion of said drain region just under said drain electrode is shallower than a portion of said source region just under said source electrode.
Claim 3
Independent Claim
204 words
A method of manufacturing a semiconductor device of compound semiconductor type having a channel layer (23, 43), and heavily impurity doped source and drain regions (22a, 42a, and 22b, 42b) formed in the surface region of a semiconductor substrate (21, 41), said channel being located between said source and drain regions, and said channel layer, and said source and drain regions being of a first conductivity type, a gate electrode (24, 44), and source and drain electrodes (25a, 45a and 25b, 45b) formed on said semiconductor substrate (21, 41), said gate electrode cooperating with said channel layer (23, 43) to form a Schottky barrier, and said source and drain electrodes being in ohmic contact with said source and drain regions, and a portion of said drain region just under said drain electrode being shallower than a portion of said source region just under said source electrode, said method characterized by comprising the steps of: implanting impurity ions into the different portions of said semiconductor substrate separately where source and drain regions are respectively to be formed and is located just under said source and drain electrodes, an ion implanting energy for forming said drain region being smaller than that for forming said source region.
Claim 4
Independent Claim
204 words
A method of manufacturing a semiconductor device of compound semiconductor type having a channel layer (23, 43), and heavily impurity doped source and drain regions (22a, 42a, and 22b, 42b) formed in the surface region of a semiconductor substrate (21, 41), said channel being located between said source and drain regions, and said channel layer, and said source and drain regions being of a first conductivity type, a gate electrode (24, 44), and source and drain electrodes (25a, 45a and 25b, 45b) formed on said semiconductor substrate (21, 41), said gate electrode cooperating with said channel layer (23, 43) to form a Schottky barrier, and said source and drain electrodes being in ohmic contact with said source and drain regions, and a portion of said drain region just under said drain electrode being shallower than a portion of said source region just under said source electrode, said method characterized by comprising the steps of: implanting impurity ions into the different portions of said semiconductor substrate separately where source and drain regions are respectively to be formed and is located just under said source and drain electrodes, an ion implanting energy for forming said drain region being smaller than that for forming said source region.
Claim 5
Independent Claim
203 words
A method of manufacturing a semiconductor device of compound semiconductor type having a channel layer (23, 43), and heavily impurity doped source and drain regions (22a, 42a, and 22b, 42b) formed in the surface region of a semiconductor substrate (21, 41), said channel being located between said source and drain regions, and said channel layer, and said source and drain regions being of a first conductivity type, a gate electrode (24, 44), and source and drain electrodes (25a, 45a and 25b, 45b) formed on said semiconductor substrate (21, 41), said gate electrode cooperating with said channel layer (23, 43) to form a Schottky barrier, and said source and drain electrodes being in ohmic contact with said source and drain regions, and a portion of said drain region just under said drain electrode being shallower than a portion of said source region just under said source electrode, said method characterized by comprising the steps of: implanting impurity ions into the different portions of said semiconductor substrate simultaneously where source and drain regions are respectively to be formed and is located just under said source and drain electrodes, an ion implantation into said drain formed portion being performed through an implanted ion absorption film (52).
Claim 6
Independent Claim
203 words
A method of manufacturing a semiconductor device of compound semiconductor type having a channel layer (23, 43), and heavily impurity doped source and drain regions (22a, 42a, and 22b, 42b) formed in the surface region of a semiconductor substrate (21, 41), said channel being located between said source and drain regions, and said channel layer, and said source and drain regions being of a first conductivity type, a gate electrode (24, 44), and source and drain electrodes (25a, 45a and 25b, 45b) formed on said semiconductor substrate (21, 41), said gate electrode cooperating with said channel layer (23, 43) to form a Schottky barrier, and said source and drain electrodes being in ohmic contact with said source and drain regions, and a portion of said drain region just under said drain electrode being shallower than a portion of said source region just under said source electrode, said method characterized by comprising the steps of: implanting impurity ions into the different portions of said semiconductor substrate simultaneously where source and drain regions are respectively to be formed and is located just under said source and drain electrodes, an ion implantation into said drain formed portion being performed through an implanted ion absorption film (52).
Claim 7
Dependent Claim
54 words
The semiconductor device according to claim 1, characterized in that said source region includes a first region (22a) being in contact with said source electrode (25a, 4a) and deeper than said drain region (22b. 42b), and a second region (27a) being in contact with said channel layer (23) and shallower than said first region.
Claim 8
Dependent Claim
22 words
The semiconductor device according to claim 1, characterized in that said drain region (22b, 42b) is deeper than said channel layer (23).
Claim 9
Dependent Claim
22 words
The semiconductor device according to claim 1, characterized in that said drain region (22b, 42b) is equal to said channel layer (23).
Claim 10
Dependent Claim
22 words
The semiconductor device according to claim 1, characterized in that said drain region (22b, 42b) is shallower than said channel layer (23).
References Cited (Backward Citations)
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