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EP0305068A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Controlling asynchronously operating peripherals

Assignee: International Business Machines Corp
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Filing: 1988-08-04
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Granted: —
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Expires: 2008-08-04
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Abstract

Abstract A plurality of host processors share access to a peripheral data storage sub-system and each have program means for controlling asynchronous operations of the sub-system. Control blocks in each of the host processors are addressably linked together for enabling inferred access to a unit control block (UCB) for any of a plurality of peripheral devices in the sub-system. The sub-system selectively groups some of the devices such that only devices designated as primary devices are addressably accessible by host processor application programs. Other devices in the respective groups are secondary devices and are accessed by the sub-system whenever the primary device in the same group cannot perform a host processor commanded operation. Means are provided for identifying the secondary devices to all of the host processors.

Inventors

  • 👤 Robert Nelson Crockett
  • 👤 Robert Frederick Kern
  • 👤 Arnold Grant Miller
  • 👤 Richard Ernest Norris
  • 👤 Michael William Pousson, Jr.
  • 👤 Robert E. Wagner

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 14:47
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/16; G06F11/20; G06F11/2002; G06F11/2007; G06F11/201; G06F13/00; G06F13/10; G06F13/12; G06F13/124; G06F13/126

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 158 words
A data processing system including a plurality of host processors connected to a peripheral sub-system which has a control processor and a group of redundant facilities - devices and/or functions - of which the host processors and the control processor maintain direct addressability to only one - the primary facility - but maintain status to all facilities of the group - primary and secondary - and wherein the control processor is arranged, on change of status of any facility of the group or on demand from any host processor, to issue an untagged interrupt to signal all the host processors that there has been a status change and each of the host processors is arranged to respond independently to such signal to establish an asynchronous independent interrogation of each facility of the group, via the control processor, and to update its record of the status of the facilities of the group in response to the asynchronously received responses.
Claim 2
Dependent Claim 158 words
A data processing system including a plurality of host processors connected to a peripheral sub-system which has a control processor and a group of redundant facilities - devices and/or functions - of which the host processors and the control processor maintain direct addressability to only one - the primary facility - but maintain status to all facilities of the group - primary and secondary - and wherein the control processor is arranged, on change of status of any facility of the group or on demand from any host processor, to issue an untagged interrupt to signal all the host processors that there has been a status change and each of the host processors is arranged to respond independently to such signal to establish an asynchronous independent interrogation of each facility of the group, via the control processor, and to update its record of the status of the facilities of the group in response to the asynchronously received responses.
Claim 3
Dependent Claim 164 words
A system as claimed in claim 1 wherein the peripheral sub-system provides: shared programmed control and addressability to each of the facilities of the group and, potentially, to other peripheral facilities; status and configuration means operatively connected to all the peripheral facilities and to the programmed control for retentively storing configuration data for the total sub-system, the configuration data grouping predetermined ones of the peripheral facilities into the group, with its primary facility and one or more secondary facilities, means in the programmed control to maintain addressability of each primary facility and making addressability for each secondary facility limited to first addressing the primary facility of the group; and command execution means in the programmed control for actuating the secondary facilities of the group to emit device-state transition signals to all the host processors as an indication that such secondary facilities are in the same group as the primary facility, and for transferring each state transition signal to each of the connected host processors.
Claim 4
Independent Claim 454 words
A system as claimed in either preceding claim wherein each host processor has addressable storage locations for storing program indicia and control data indicia and means for addressing the addressable storage locations and for controlling asynchronous operations of the and any other connected peripheral sub-system, a set of program indicia having program steps and associated control data structures, including in combination; vector table indicia containing first and second host processor addresses for first and second control data indicia and being located at a given one of the addressable storage locations; configuration table indicia at the first address and containing third addresses in a plurality of control data entries respectively for the peripheral subsystems with a first entry being for a first peripheral sub-system having a first sub-system identification (SSID) and being located at a given address offset within the configuration table indicia; a plurality of subsystems control block indicia located at the third address with one of the sub-system control blocks being for the first peripheral sub-system and containing a fourth address pointer; plurality of facility table indicia with one table for each facility attached to a host processor within the first peripheral sub-system and having fifth and sixth address pointers, the facility table indicia being located at the fourth address; a plurality of unit control blocks (UCB), one for each facility attached to the host processor and each UCB having the second address and entry offset for the peripheral sub-system in which the respective facility exists; each of the control blocks being located at the fifth address for a respective one of the facility table indicia, the sixth addresses having a same range of addressability for the UCB's as the fifth addresses, predetermined ones of the facility tables having a fifth and sixth address with the fifth and sixth address in each of the respective device tables pointing to a different UCB and others of the facility tables only having a fifth address; IOS program indicia for communicating with a sub-system and being operative coupled to the vector table indicia and having program indicia for receiving SSID signals with interruption signals from a sub-system, and the operative coupling to the vector table indicia including means for passing the SSID signals thereto; and AOM program indicia operatively coupled to the IOS program indicia and to all of the control data indicia and having indicia for accessing the vector table indicia for reading the SSID signals, then for selecting a sub-system control block based on the SSID signals and accessing a facility table indicium for accessing a fifth and sixth address for identifying a group of UCB's addressable by both fifth and sixth addresses whereby a group of facilities in the sub-system can be identified.
Claim 5
Dependent Claim 200 words
In a method of operating a peripheral sub-system having a plurality of addressable peripheral devices and a programmed control unit commonly connected to the peripheral devices and to one or more host processors via one or more channels; the steps of: grouping some of the peripheral devices into redundant device groups; making one of the peripheral devices in each of the groups a primary device and all the rest of the peripheral devices in each respective group secondary devices; removing the addressability of all secondary devices from being addressable by addresses received by the sub-system from outside the sub-system and within the sub-system making all of the secondary devices addressable through the respective primary device in the same group; retentively storing the identification and status of all the groups and peripheral devices assigned to each the group; receiving into the sub-system a command for a primary device requesting the address of the secondary devices within the group; and for all of the secondary devices within the group, sending an untagged interrupt to outside the sub-system with the respective address of the secondary devices for indicating that the secondary devices are in the group with the primary device receiving the command.
Claim 6
Dependent Claim 200 words
In a method of operating a peripheral sub-system having a plurality of addressable peripheral devices and a programmed control unit commonly connected to the peripheral devices and to one or more host processors via one or more channels; the steps of: grouping some of the peripheral devices into redundant device groups; making one of the peripheral devices in each of the groups a primary device and all the rest of the peripheral devices in each respective group secondary devices; removing the addressability of all secondary devices from being addressable by addresses received by the sub-system from outside the sub-system and within the sub-system making all of the secondary devices addressable through the respective primary device in the same group; retentively storing the identification and status of all the groups and peripheral devices assigned to each the group; receiving into the sub-system a command for a primary device requesting the address of the secondary devices within the group; and for all of the secondary devices within the group, sending an untagged interrupt to outside the sub-system with the respective address of the secondary devices for indicating that the secondary devices are in the group with the primary device receiving the command.
Claim 7
Dependent Claim 426 words
A method as claimed in claim 4, wherein the devices are storage devices and there is a fast access cache in the programmed controller for storing data during data transfer operations between any of the commonly connected host processors and addressed ones of the devices, the host processors accessing data areas in the cache and in the peripheral devices via addresses of the devices, the device addresses including the addresses with the paths not being individually and separately addressable by the host processors, each of the commonly connected host processors having a unit control block (UCB) for and describing the respective peripheral devices and control tables describing current configuration and status of the peripheral sub-system; the grouping of less than all of the peripheral devices into one or more logical groups of primary and secondary devices, making the primary devices directly addressable by any of the commonly connected host processors and making the secondary devices not directly addressable by the host processors; establishing, in each of the commonly connected host processors, a device table for each of the devices which tables are separate from the UCB's, storing the addresses of the peripheral devices of the same sub-system group that the peripheral device identified by the respective device table belongs and indicating in each device table whether each of the peripheral devices are primary or secondary devices; the peripheral sub-system retentive identification and status storing including the storing of the addresses of the devices in the respective groups and indicating which of the devices are primary or secondary devices, and the status of the cache and control unit; as well as, if any, the changed status of a peripheral device, control unit or cache of the peripheral sub-system from within such peripheral sub-system; an untagged interruption signal being sent from the control unit which identifies a one of the peripheral devices affected by such change in status and indicating in the interruption signal that a device-state transition has occurred; in each of the commonly connected host processors receiving the untagged interruption signal, operating the respective host processors to respond to the interruption signal to command the peripheral sub-system to supply status about the device identified in the interruption signal and status of control unit or cache irrespective of what change in status occurred in the sub-system; and operating the peripheral sub-system to respond to the command to send the change in status to the respective commanding hose processor, then operating the host processor to update its UCB's and control tables to reflect the change in sub-system status.
Claim 8
Dependent Claim 230 words
A method as claimed in claim 5, further including: establishing a configuration table for the peripheral sub-system including first and second address pointers; establishing a sub-system control block having a plurality of entries, one of the entries being for each of the devices in the peripheral sub-system and having a third address pointer, making the first address pointer point to the host processor address at which the sub-system control block is established; making the third address pointer in the respective entries of the sub-system control block point to the device table established for the device for which the sub-system control block entry was made, making fourth and fifth address pointers in each of the device tables; establishing one unit control block (UCB) for each device of the sub-system and including a sixth address pointer in the UCB, making the sixth address pointer point to the entry in the configuration table which points to the sub-system control block; making each of the fourth address pointers point to a UCB established for the device represented by the device table and making each of the fifth address pointers point to a UCB established for a device in the same group of devices in which the device represented by the device table resides; and establishing an asynchronous operation queue for the sub-system and making the second address pointer point to the asynchronous operation queue.
Claim 9
Dependent Claim 91 words
A method as claimed in claim 6, further including: generating in the host processor a request for a sub-system asynchronous operation command, establishing an entry in the asynchronous queue for the operation command and sending the command to the sub-system; and receiving from the sub-system an interruption signal including the device-state transition indication for a first one of the devices, then accessing an UCB via the configuration table, sub-system table and device table for a device other than the first one device and performing an operation related to the other device.

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