D/A converter

Claim 2

A digital-to-analog converter comprising: a group of resistors (R+r) serially connected be­tween a power source potential supply terminal (Vref) and a reference potential supply terminal (Vss); a first group of switches (T), connected between a first circuit point (P) and a predetermined serial con­nection node (N) on said resistor group (R) and between the first circuit point (P) and said reference potential supply terminal (Vss), and controlled so that one of them is selectively turned on according to upper bits (L) of a digital signal (DSL to DU1); a second group of switches (U), connected between a second circuit point (Q) and a predetermined serial connection node (n) on said resistor group (r) and be­tween the second circuit point (Q) and said reference potential supply terminal (Vss), and controlled so that one of them is selectively turned on according to lower bits (M, N) of the digital signal (DSL to DU1); and first and second capacitors (C1 and C2) connected between an output terminal (Vout) and said first circuit point (P), and between the output terminal (Vout) and said second circuit point (Q), respectively.

Claim 3

A digital-to-analog converter according to claim 1, characterized in that said resistor group (R+r) includes a first group of serially connected resistors (R) each having a first resistance and a second group of serially connected resistors (r) each having a second resistance, said first and second resistor groups being connected in series with each other and the total sum of said second group of resistors being set equal to the first resistance (R=Σr); the switches in said first switching group (T) are connected between respective corresponding serial con­nection nodes (N(2 M -1) to N3) of the resistors in said first resistor group (R) and said first circuit point (P), between said first circuit point (P) and the serial connection node between said first and second resistor groups (R and r), and between said reference potential supply terminal (Vss) and said first circuit point (P); the switches in said second switching group (U) are connected between respective corresponding serial con­nection nodes (n(2 N -1) to n2) of the resistors in said second resistor group (r) and said second circuit point (Q), and between said reference potential supply ter­minal (Vss) and said second circuit point (Q); and the capacitance of said first capacitor (C1) is substantially equal (C1=C2) to that of said second capacitor (C2).

Claim 4

A digital-to-analog converter according to claim 1 or 2, characterized in that said resistor group (R) is formed of a series of resistors having substan­tially the same resistance; the switches in said first switching group (T) are connected between respective corresponding serial con­nection nodes (N(2 M -1) to N2) of the resistors in said resistor group (R) and said first circuit point (P), and between said reference potential supply terminal (Vss) and said first circuit point (P); the switches in said second switching group (U) are connected between respective corresponding serial con­nection nodes (N(2 M -2) to N2) of the resistors in said resistor group (R) and said second circuit point (Q), and between said reference potential supply terminal (Vss) and said second circuit point (Q); and the capacitance of said second capacitor (C2) is substantially equal to a value (C2=C1/2 N ) which is obtained by dividing the capacitance of said first capacitor (C1) by the number (2 N ) of the switches constituting said second switching group (U).

Claim 5

A digital-to-analog converter comprising: a group of resistors (R+r) serially connected be­tween a power source potential supply terminal (Vref) and a reference potential supply terminal (Vss); a first group of switches (T), connected between a first circuit point (P) and predetermined serial connec­tion nodes (N(2 M -1) to N1) on said resistor group (R) and between the first circuit point (P) and said refer­ence potential supply terminal (Vss), and controlled so that one of them is selectively turned on according to the result (OT(2 M -1) to OT(1)) of decoding middle bits (DTM to TD1) of a digital signal (DSL to DU1); a second group of switches (U), connected between a second circuit point (Q) and predetermined serial con­nection nodes (n(2 N -1) to n2, N1) on said resistor group (r) and between the second circuit point (Q) and said reference potential supply terminal (Vss), and control­led so that one of them is selectively turned on accord­ing to the result (OS(2 N -1) to OS(1)) of decoding for lower bits (DUN to DU1) of the digital signal (DSL to DU1); a third group of switches (S) whose one ends are respectively controlled to be selectively connected to said power source potential supply terminal (Vref) or reference potential supply terminal (Vss) according to the result (OS(2 L -1) to OS(1)) of decoding for upper bits (DSL to DS1) of the digital signal (DSL to DU1); a group of capacitors (Co1 to Cox) respectively connected between the other ends of the switches in said third switching group (S) and an output terminal (Vout); and first and second capacitors (C1 and C2) respec­tively connected between the output terminal (Vout) and said first circuit point (P), and between the output terminal (Vout) and said second circuit point (Q), respectively.

Claim 6

A digital-to-analog converter comprising: a group of resistors (R+r) serially connected be­tween a power source potential supply terminal (Vref) and a reference potential supply terminal (Vss); a first group of switches (T), connected between a first circuit point (P) and predetermined serial connec­tion nodes (N(2 M -1) to N1) on said resistor group (R) and between the first circuit point (P) and said refer­ence potential supply terminal (Vss), and controlled so that one of them is selectively turned on according to the result (OT(2 M -1) to OT(1)) of decoding middle bits (DTM to TD1) of a digital signal (DSL to DU1); a second group of switches (U), connected between a second circuit point (Q) and predetermined serial con­nection nodes (n(2 N -1) to n2, N1) on said resistor group (r) and between the second circuit point (Q) and said reference potential supply terminal (Vss), and control­led so that one of them is selectively turned on accord­ing to the result (OS(2 N -1) to OS(1)) of decoding for lower bits (DUN to DU1) of the digital signal (DSL to DU1); a third group of switches (S) whose one ends are respectively controlled to be selectively connected to said power source potential supply terminal (Vref) or reference potential supply terminal (Vss) according to the result (OS(2 L -1) to OS(1)) of decoding for upper bits (DSL to DS1) of the digital signal (DSL to DU1); a group of capacitors (Co1 to Cox) respectively connected between the other ends of the switches in said third switching group (S) and an output terminal (Vout); and first and second capacitors (C1 and C2) respec­tively connected between the output terminal (Vout) and said first circuit point (P), and between the output terminal (Vout) and said second circuit point (Q), respectively.

Claim 7

A digital-to-analog converter according to claim 4, characterized in that said resistor group (R+r) includes a first group of serially connected resistors (R) each having a first resistance and a second group of serially connected resistors (r) each having a second resistance, said first and second resistor groups being connected in series with each other, and the total sum of said second group of resistors being set equal to the first resistance (R=Σr); the switches in said first switching group (T) are connected between respective corresponding serial con­nection nodes (N(2 M -1) to N3) of the resistors in said first resistor group (R) and said first circuit point (P), between said first circuit point (P) and the serial connection node between said first and second resistor groups (R and r), and between said reference potential supply terminal (Vss) and said first circuit point (P); the switches in said second switching group (U) are connected between respective corresponding serial con­nection nodes (n(2 N -1) to n2) of the resistors in said second resistor group (r) and said second circuit point (Q), and between said reference potential supply ter­minal (Vss) and said second circuit point (Q); and the capacitances of said first and second capaci­tors (C1 and C2) are substantially equal (C1=C2=Co1) to the capacitance of the one capacitor of said capacitor group (Co1 to Cox).

Claim 8

A digital-to-analog converter according to claim 4 or 5, characterized in that said resistor group (R) is formed of a series of resistors having substan­tially the same resistance; the switches in said first switching group (T) are connected between respective corresponding serial connection nodes (N(2 M -1) to N2) of the resistors in said resistor group (R) and said first circuit point (P), and between said reference potential supply ter­minal (Vss) and said first circuit point (P); the switches in said second switching group (U) are connected between respective corresponding serial con­nection nodes (N(2 M -2) to N2) of the resistors in said resistor group (R) and said second circuit point (Q), and between said reference potential supply terminal (Vss) and said second circuit point (Q); and the capacitance of said first capacitor (C1) is substantially equal (C1=Co) to that of the capacitors of said capacitor group (Co1 to Cox), and the capaci­tance of said second capacitor (C2) is substantially equal to a value (C2=C1/2 N ) which is obtained by divid­ing the capacitance of said first capacitor (C1) by the number (2 N ) of the switches constituting said second switching group (U).

Claim 9

A digital-to-analog converter according to claim 4, 5 or 6, further comprising an output capacitor (Co) connected between a given fixed potential circuit (Vs) and said output terminal (Vout).