Patent EP0274390A2 successfully refreshed from Google Patents.
EP0274390A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Semiconductor memory device and method of manufacturing the same
Assignee: Toshiba Corp
•
Filing: 1988-01-07
•
Granted: —
•
Expires: 2008-01-07
Abstract
Abstract In a semiconductor memory device having a floating gate structure, the floating gate electrode (30) is composed of 2 to 10 silicon grains. With the floating gate electrode, the insulation film (31), formed on the floating gate electrode, can have a high breakdown voltage. In a method of manufacturing a semiconductor memory device having a floating gate structure, an insulation film (23) is formed on the silicon substrate (21), portions of the insulation film which are on the drain and source forming regions of the silicon substrate are removed, and a silicon layer (24a) is formed on the silicon substrate (21) by an epitaxial growth process, constituting a floating gate, composed of 2 to 10 silicon grains. According to the manufacturing method, the insulation film (31) formed on the floating gate electrode can have a high breakdown voltage.
Inventors
- 👤 Yuuichi C/O Patent Division Mikata
- 👤 Toshiro C/O Patent Division Usami
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 04:46
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/685; H10D64/00; H10D64/01; H10D64/031; H10D64/035
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
23 words
A semiconductor memory device characterized by comprising: a silicon substrate (21); and a silicon layer (30) composed of 2 to 10 silicon grains.
Claim 2
Dependent Claim
23 words
A semiconductor memory device characterized by comprising: a silicon substrate (21); and a silicon layer (30) composed of 2 to 10 silicon grains.
Claim 3
Dependent Claim
26 words
A semiconductor memory device according to claim 1, characterized in that said silicon layer (30) constitutes a floating gate electrode (30) of a semiconductor memory device.
Claim 4
Dependent Claim
123 words
A semiconductor memory device having a floating gate structure, characterized by comprising: a silicon substrate (21) having a drain region (8) and a source region (9); a floating gate electrode (30) formed of a polysilicon layer composed of 2 to 10 polysilicon grains; a first insulation film (31) formed on said floating gate electrode; a control gate electrode (15) formed of a polysilicon layer formed on said first insulation film; a second insulation film (10) formed on the structure, and having contact holes leading to at least one of said drain region and source region; and electrode layers (11, 12) extending in said contact holes formed in said second insulation film, and contacting said at least one of drain region and source region.
Claim 5
Dependent Claim
123 words
A semiconductor memory device having a floating gate structure, characterized by comprising: a silicon substrate (21) having a drain region (8) and a source region (9); a floating gate electrode (30) formed of a polysilicon layer composed of 2 to 10 polysilicon grains; a first insulation film (31) formed on said floating gate electrode; a control gate electrode (15) formed of a polysilicon layer formed on said first insulation film; a second insulation film (10) formed on the structure, and having contact holes leading to at least one of said drain region and source region; and electrode layers (11, 12) extending in said contact holes formed in said second insulation film, and contacting said at least one of drain region and source region.
Claim 6
Dependent Claim
142 words
A semiconductor memory device with a floating gate structure, characterized by comprising: a silicon substrate (21) having a drain region and a source region (8, 9) formed therein; a first polysilicon layer composed of 2 to 10 polysilicon grains, forming a floating gate electrode (30); second polysilicon layers (24) formed on at least one of said drain region and source region; a first insulation film (31) formed on said floating gate electrode; a third polysilicon layer formed on said first insulation film, forming a control gate electrode (32); fourth polysilicon layers (27) formed on said second polysilicon layers; a second insulation film (33, 36) formed on the structure, and having contact holes formed therein leading to said fourth polysilicon layers; and electrode layers (38, 39) extending in said contact holes formed in said second insulation film, and contacting said second polysilicon layers.
Claim 7
Dependent Claim
142 words
A semiconductor memory device with a floating gate structure, characterized by comprising: a silicon substrate (21) having a drain region and a source region (8, 9) formed therein; a first polysilicon layer composed of 2 to 10 polysilicon grains, forming a floating gate electrode (30); second polysilicon layers (24) formed on at least one of said drain region and source region; a first insulation film (31) formed on said floating gate electrode; a third polysilicon layer formed on said first insulation film, forming a control gate electrode (32); fourth polysilicon layers (27) formed on said second polysilicon layers; a second insulation film (33, 36) formed on the structure, and having contact holes formed therein leading to said fourth polysilicon layers; and electrode layers (38, 39) extending in said contact holes formed in said second insulation film, and contacting said second polysilicon layers.
Claim 8
Dependent Claim
79 words
A semiconductor memory device according to claim 4, characterized in that said fourth polysilicon layers (27) have contact holes continuous to said contact holes formed in said second insulation film (33, 36), and characterized by further comprising third insulation films formed between said second polysilicon layers, on the one hand, and said fourth polysilicon layers, on the other hand, and having contact holes continuous to said contact holes formed in said fourth polysilicon layers and said second insulation film.
Claim 9
Independent Claim
87 words
A method of manufacturing a semiconductor memory device, characterized by comprising the steps of: forming an insulation film (23) on a silicon substrate (21); removing a predetermined portion of said insulation film; forming a silicon layer (24) on said silicon substrate by an epitaxial growth process, said silicon layer having a portion (24a) which extends on said insulation film and composes 2 to 10 silicon grains; and removing a predetermined portion of said silicon layer to form a portion (30) thereof which is separated from said substrate.
Claim 10
Independent Claim
87 words
A method of manufacturing a semiconductor memory device, characterized by comprising the steps of: forming an insulation film (23) on a silicon substrate (21); removing a predetermined portion of said insulation film; forming a silicon layer (24) on said silicon substrate by an epitaxial growth process, said silicon layer having a portion (24a) which extends on said insulation film and composes 2 to 10 silicon grains; and removing a predetermined portion of said silicon layer to form a portion (30) thereof which is separated from said substrate.
Claim 11
Dependent Claim
64 words
A method of manufacturing a semiconductor memory device according to claim 6, characterized in that said predetermined portion of said insulation film is on at least one of the drain and source forming regions of a semiconductor memory device having a floating gate structure, and said separated portion (30) of said silicon layer constitutes a floating gate electrode (30) of said semiconductor memory device.
Claim 12
Independent Claim
214 words
A method of manufacturing a semiconductor memory device having a floating gate structure, characterized by comprising the steps of: forming a first insulation film (23) on a silicon substrate (21); removing that portion of said insulation film, which is at least one of the drain and source forming regions of said silicon substrate to form a gate insulation film (29); forming a first polysilicon layer (24) composed of 2 to 10 silicon grains on said silicon substrate by an epitaxial growth process; forming a second insulation film (26) on said first polysilicon layer; forming a second polysilicon layer (27) on said second insulation film; removing the predetermined portions of said first polysilicon layer, first insulation film, and second polysilicon layer, so that a portion thereof remains which is on said gate insulation film, and said at least one of drain and source forming regions is exposed; doping impurities into said drain and source forming regions to form a source (35) and drain (34); forming a third insulation film (33, 36) on the structure, having contact holes formed therein leading to at least one of said drain and source; and forming electrodes (38, 39) extending in said contact holes formed in said third insulation film and contacting said at least one of drain and source.
Claim 13
Independent Claim
214 words
A method of manufacturing a semiconductor memory device having a floating gate structure, characterized by comprising the steps of: forming a first insulation film (23) on a silicon substrate (21); removing that portion of said insulation film, which is at least one of the drain and source forming regions of said silicon substrate to form a gate insulation film (29); forming a first polysilicon layer (24) composed of 2 to 10 silicon grains on said silicon substrate by an epitaxial growth process; forming a second insulation film (26) on said first polysilicon layer; forming a second polysilicon layer (27) on said second insulation film; removing the predetermined portions of said first polysilicon layer, first insulation film, and second polysilicon layer, so that a portion thereof remains which is on said gate insulation film, and said at least one of drain and source forming regions is exposed; doping impurities into said drain and source forming regions to form a source (35) and drain (34); forming a third insulation film (33, 36) on the structure, having contact holes formed therein leading to at least one of said drain and source; and forming electrodes (38, 39) extending in said contact holes formed in said third insulation film and contacting said at least one of drain and source.
Claim 14
Independent Claim
237 words
A method of manufacturing a semiconductor memory device having a floating gate structure, characterized by comprising the steps of: forming a first insulation film (23) on a silicon substrate (21); removing that portion of said insulation film, which is on at least one of the drain and source forming regions of said silicon substrate to form a gate insulation film (29); doping impurities into said drain and source forming regions to form a source (35) and drain (34); forming a first polysilicon layer (24) composed of 2 to 10 silicon grains on said silicon substrate by an epitaxial growth process; forming a second insulation film (26) on said first polysilicon layer; forming a second polysilicon layer (27) on said second insulation film; removing the predetermined portions of said first polysilicon layer, first insulation film, and second polysilicon layer, so that those portions thereof remain, which are on said gate insulation film and at least one of said drain and source; forming a third insulation film (33, 36) on the structure; forming contact holes in said third insulation film, second insulation film, and second polysilicon layer, leading to said portions of said second polysilicon layer remaining on said at least one of source and drain; and forming electrodes (38, 39) extending in said contact holes and contacting at least one of said portions of said second semiconductor layer remaining on said at least one of source and drain.
Claim 15
Independent Claim
237 words
A method of manufacturing a semiconductor memory device having a floating gate structure, characterized by comprising the steps of: forming a first insulation film (23) on a silicon substrate (21); removing that portion of said insulation film, which is on at least one of the drain and source forming regions of said silicon substrate to form a gate insulation film (29); doping impurities into said drain and source forming regions to form a source (35) and drain (34); forming a first polysilicon layer (24) composed of 2 to 10 silicon grains on said silicon substrate by an epitaxial growth process; forming a second insulation film (26) on said first polysilicon layer; forming a second polysilicon layer (27) on said second insulation film; removing the predetermined portions of said first polysilicon layer, first insulation film, and second polysilicon layer, so that those portions thereof remain, which are on said gate insulation film and at least one of said drain and source; forming a third insulation film (33, 36) on the structure; forming contact holes in said third insulation film, second insulation film, and second polysilicon layer, leading to said portions of said second polysilicon layer remaining on said at least one of source and drain; and forming electrodes (38, 39) extending in said contact holes and contacting at least one of said portions of said second semiconductor layer remaining on said at least one of source and drain.
Claim 16
Dependent Claim
69 words
A method of manufacturing a semiconductor memory device according to claim 9, characterized by further comprising a step of, between said step for forming a second insulation film on said first polysilicon layer and said step for forming a second polysilicon layer on said second insulation film, removing a predetermined portion of said second polysilicon layer leaving only said second polysilicon layer to remain, above said gate insulation film.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.