Patent EP0272188A2 successfully refreshed from Google Patents.
EP0272188A2
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EP
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Ceramic package for high frequency semiconductor devices
Assignee: Fairchild Semiconductor Corp
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Filing: 1987-12-17
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Granted: —
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Expires: 2007-12-17
Abstract
Abstract A ceramic semiconductor package (10) suitable for high frequency operation includes internal and external ground planes formed on opposite faces of a ceramic base member (12). The internal ground plane (22) is connected to a ground ring formed on the packaged semiconductor device, and both ground planes are interconnected about the periphery of the package. In this way, a uniform and continuous ground is provided to minimize variations in signal transmission line impedance.
Inventors
- 👤 William S. Phy
- 👤 James M. Early
- 👤 Kevin J. Negus
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 10:16
CPC Classifications
H; H10; H10W; H10W76/00; H10W76/10; H10W76/12; H10W76/15; H10W76/157; H10W44/00; H10W44/20; H10W70/00; H10W70/60; H10W70/62; H10W70/65; H10W70/657; H10W70/67; H10W70/68; H10W70/685; H10W70/682; H10W72/00; H10W72/071; H10W72/075; H10W72/07551; H10W72/07554; H10W72/50; H10W72/541; H10W72/5449; H10W72/547
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
134 words
A ceramic semiconductor package comprising: a ceramic base having parallel faces and a peripheral edge between said faces, wherein a first of said faces includes a site for attaching a semiconductor device; an internal ground plane formed on said first of said faces and extending substantially from the attachment site to the peripheral edge; an external ground plane formed on a second of said faces and covering substantially the entire area thereof; means for electrically connecting the internal ground plane and the external ground plane; a ceramic spacing layer over the internal ground plane on the first face of the ceramic base; a plurality of signal transmission lines formed over the ceramic spacing layer; a ceramic isolation layer formed over the ceramic spacing layer and filling spaces between adjacent conductors; and a cover layer.
Claim 2
Dependent Claim
134 words
A ceramic semiconductor package comprising: a ceramic base having parallel faces and a peripheral edge between said faces, wherein a first of said faces includes a site for attaching a semiconductor device; an internal ground plane formed on said first of said faces and extending substantially from the attachment site to the peripheral edge; an external ground plane formed on a second of said faces and covering substantially the entire area thereof; means for electrically connecting the internal ground plane and the external ground plane; a ceramic spacing layer over the internal ground plane on the first face of the ceramic base; a plurality of signal transmission lines formed over the ceramic spacing layer; a ceramic isolation layer formed over the ceramic spacing layer and filling spaces between adjacent conductors; and a cover layer.
Claim 3
Dependent Claim
20 words
A ceramic semiconductor package as in claim 1, wherein the attachment site is a cavity formed in the ceramic base.
Claim 4
Dependent Claim
37 words
A ceramic semiconductor package as in claim 1, wherein the internal and external ground planes are connected by a plurality of conductors spaced about the periphery of the base and extending between said first and second faces.
Claim 5
Dependent Claim
21 words
A ceramic semiconductor package as in claim 3, wherein said spaced conductors are recessed in channels extending between the parallel faces.
Claim 6
Dependent Claim
130 words
An improved semiconductor package of the type including a ceramic base, a semiconductor device mounted on the base, a plurality of ceramic layers over the base enclosing the semiconductor device, and a plurality of conductors lying in a plane between adjacent ceramic layers and extending from proximate the semiconductor device to the periphery of the package, the improvement comprising: an internal ground plane formed on a first surface of the base parallel to the conductor plane; an external ground plane formed on a second surface of the base parallel to the conductor plane; means for electrically connecting the internal and external ground planes to each other; and means at or near the periphery of the base for electrically connecting the internal ground plane to a ground on the semiconductor device.
Claim 7
Dependent Claim
130 words
An improved semiconductor package of the type including a ceramic base, a semiconductor device mounted on the base, a plurality of ceramic layers over the base enclosing the semiconductor device, and a plurality of conductors lying in a plane between adjacent ceramic layers and extending from proximate the semiconductor device to the periphery of the package, the improvement comprising: an internal ground plane formed on a first surface of the base parallel to the conductor plane; an external ground plane formed on a second surface of the base parallel to the conductor plane; means for electrically connecting the internal and external ground planes to each other; and means at or near the periphery of the base for electrically connecting the internal ground plane to a ground on the semiconductor device.
Claim 8
Dependent Claim
34 words
An improved semiconductor package as in claim 5, wherein the semiconductor device includes a ground ring formed about its active surface, and wherein the ground ring is electrically connected to the internal ground plane.
Claim 9
Dependent Claim
40 words
An improved semiconductor package as in claim 6, wherein the ground ring on the semiconductor device is connected to the internal ground plane of the package by a plurality of bonding members spaced-apart about the periphery of the semiconductor device.
Claim 10
Dependent Claim
56 words
An improved semiconductor package as in claim 7, wherein signal connection pads on the semiconductor device are connected to the conductors between adjacent ceramic layers by bonding members, and wherein said signal bonding members and the ground bonding members are alternated to improve uniformity in the ground connection and decrease coupling between adjacent signal bonding members.
Claim 11
Dependent Claim
15 words
An improved semiconductor package as in claim 8, wherein the bonding members are wire bonds.
Claim 12
Dependent Claim
15 words
An improved semiconductor package as in claim 8, wherein the bonding members are tape bonds.
Claim 13
Dependent Claim
47 words
An improved semiconductor package as in claim 5, wherein the semiconductor device is mounted in a cavity formed in the first surface of the base so that an active surface of the semiconductor device lies in substantially the same plane as the first surface of the base.
Claim 14
Dependent Claim
28 words
An improved semiconductor package as in claim 5, wherein signal connection pads on the semiconductor device are connected to the conductors between adjacent ceramic layers by wire bonds.
Claim 15
Dependent Claim
28 words
An improved semiconductor package as in claim 5, wherein signal connection pads on the semiconductor device are connected to the conductors between adjacent ceramic layers by tape bonds.
Claim 16
Dependent Claim
40 words
An improved semiconductor package as in claim 5, wherein the means for electrically connecting the internal and external ground planes includes a plurality of conductors spaced-apart about the periphery of the base and extending between the first and second faces.
Claim 17
Dependent Claim
34 words
An improved semiconductor package as in claim 14, wherein the periphery of the ceramic base includes channels extending between said first and second faces and wherein said spaced-apart conductors are recessed in said channels.
Claim 18
Dependent Claim
20 words
An improved semiconductor package as in claim 15, wherein said conductors include terminal connectors at the periphery of the base.
Claim 19
Dependent Claim
18 words
An improved semiconductor package as in claim 16, wherein the terminal connectors are located between adjacent spaced-apart conductors.
References Cited (Backward Citations)
No citation records indexed.
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