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EP0271686A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

On chip multi-level voltage generation system

Assignee: International Business Machines Corp
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Filing: 1987-10-31
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Granted: —
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Expires: 2007-10-31
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Abstract

Abstract On-chip multi-level voltage generating system comprising charge pump circuit means (26) responsive to a low voltage for supplying multiple voltages on a high voltage output, a plurality of selectable feedback paths connected to the output of said charge pump circuit means (26) with each feedback path controlling the charge pump circuit means to output a selected voltage level, and charge pump control means (28) coupled to a drive input (30) of the charge pump circuit means (26) and in series with each feedback path, and being responsive to enabling signals to activate the feedback path corresponding to the selected voltage level.

Inventors

  • 👤 Hayden Clay Cranford, Jr.
  • 👤 Stacy Jean Garvin
  • 👤 Wendy Kay Hodgin
  • 👤 John Mark Mullen

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-31 12:54
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/30; G11C5/00; G11C5/14; G11C5/143; G11C5/145; H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/06; H02M3/07

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 107 words
An on-chip multi-level voltage generating system characterized in that it comprises : charge pump circuit means (26) responsive to a low voltage for supplying multiple voltages on a high voltage output, a plurality of selectable feedback paths connected to the output of said charge pump circuit means with each feedback path controlling the charge pump circuit means to output a selected voltage level, and charge pump control means (28) coupled to a drive (30) input of said charge pump circuit means and in series with each feedback path, said control means being responsive to enabling signals to activate the feedback path corresponding to the selected voltage level.
Claim 2
Dependent Claim 107 words
An on-chip multi-level voltage generating system characterized in that it comprises : charge pump circuit means (26) responsive to a low voltage for supplying multiple voltages on a high voltage output, a plurality of selectable feedback paths connected to the output of said charge pump circuit means with each feedback path controlling the charge pump circuit means to output a selected voltage level, and charge pump control means (28) coupled to a drive (30) input of said charge pump circuit means and in series with each feedback path, said control means being responsive to enabling signals to activate the feedback path corresponding to the selected voltage level.
Claim 3
Dependent Claim 56 words
The on-chip multi-level voltage generating system of claim 1 further including a powerdown circuit means (32) coupling the output of said charge pump circuit means (26) with said charge pump control means (28) and operable when activated to provide an electrical discharge path between the output of said charge pump circuit means and a reference potential.
Claim 4
Dependent Claim 62 words
The on-chip multi-level voltage generating system of claim 2 wherein said powerdown circuit means (32) includes a plurality of FET devices connected in series with each device having a gate electrode, a chain of series connected devices connected to the gate electrode of each FET device, and means for clamping the gate electrode of each FET device to the low power supply.
Claim 5
Dependent Claim 45 words
The on-chip multi-level voltage generating system of claim 1, 2 or 3 wherein each feedback path includes a voltage regulating means, a timer circuit for periodically resetting the voltage regulating means and a sensing circuit means for sensing a voltage on the voltage regulating means.
Claim 6
Dependent Claim 21 words
The on-chip multi-level voltage generating system of claim 4 wherein the voltage regulating means includes a series connected string of capacitors.
Claim 7
Dependent Claim 61 words
The on-chip multi-level voltage generating system of claim 4 or 5 wherein the sensing circuit means includes a differential amplifier having one input connected to a reference node and one input connected to the voltage to be sensed; and circuit means connected to the reference node and operable for adjusting a voltage on said node to compensate for power supply variation.
Claim 8
Dependent Claim 124 words
The on-chip multi-level voltage generating system according to any one of the preceding claims wherein said charge pump control means includes an overvoltage/undervoltage detection network having an input connected to the low voltage power supply and outputs for supplying signals representative of the state of the power supply, an interface logic circuit means responsive to an output signal from said overvoltage/undervoltage network and to generate control signals for enabling/disabling the charge pump, a reset delay sense circuit having an output connected to the interface logic circuit means and an input, and a get25/save3 logic circuit means connected to the input of the reset delay, sense circuit and operable to generate and output signals representative of the voltage on the output of said charge pump.
Claim 9
Dependent Claim 29 words
The on-chip multi-level voltage generating system according to any one of the preceding claims further including a capacitive means connected to the output said charge pump circuit means (26).

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