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EP0271121A1
Expired / Lapsed
EP
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Directly mixing synchronous receiver
Assignee: Koninklijke Philips NV
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Filing: 1987-11-04
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Granted: —
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Expires: 2007-11-04
Abstract
Abstract Directly mixing synchronous receiver having an RF input (1) and a first signal path (S1) which is coupled thereto and which incorporates a first synchronous demodulator (3) and a first low-pass filter (4), and having a carrier regeneration circuit comprising a first phase-locked loop (Q) incorporating in a loop configuration a first phase detector (5) which is coupled to the RF input (1), a first loop filter (6) and a first voltage-controlled tuning oscillator (8) an output of which is coupled to the first phase detector (5) on the one hand and to the first synchronous demodulator (3) via a phase shift circuit on the other hand for a direct demodulation of an RF reception signal to the frequency baseband. The local mixing carrier required for the direct synthonous demodulation should be accurately in phase or in antiphase with the carrier of a desired RF reception signal to be demodulated. To this end the phase shift circuit comprises a second phase-locked loop (P) incorporating in a loop configuration a second phase detector (8) which is coupled to said output of the first voltage-controlled oscillator (7), a second loop filter (9) and a second voltage-controlled tuning oscillator (10) an output of which is coupled to the second phase detector (8) on the one hand and to the first synchronous demodulator (3) on the other hand, the tuning of the first voltage controlled tuning oscillator (7) being coupled with that of the second voltage-controlled tuning oscillator (10).
Inventors
- 👤 Engel Roza
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-06 11:02
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/04; H03; H03D; H03D1/00; H03D1/22; H03L; H03L7/00; H03L7/06; H03L7/07
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
194 words
A directly mixing synchronous receiver having an RF input and a first signal path which is coupled thereto and which incorporates a first synchronous demodulator and a first low-pass filter, and having a carrier regeneration circuit comprising a first phase-locked loop incorporating in a loop configuration a first phase detector which is coupled to the first signal path, a first loop filter and a first voltage-controlled tuning oscillator an output of which is coupled to the first phase detector on the one hand and to the first synchronous demodulator via a phase-shift circuit on the other hand for a direct demodulation of an RF reception signal to the frequency baseband, characterized in that the phase-shift circuit comprises a second phase-locked loop incorporating in a loop configuration a second phase detector which is coupled to said output of the first voltage-controlled oscillator, a second loop filter and a second voltage-controlled tuning oscillator an output of which is coupled on the one hand to the second phase detector and on the other hand to the first synchronous demodulator, the tuning of the first voltage-controlled tuning oscillator being coupled with that of the second voltage-controlled tuning oscillator.
Claim 2
Dependent Claim
194 words
A directly mixing synchronous receiver having an RF input and a first signal path which is coupled thereto and which incorporates a first synchronous demodulator and a first low-pass filter, and having a carrier regeneration circuit comprising a first phase-locked loop incorporating in a loop configuration a first phase detector which is coupled to the first signal path, a first loop filter and a first voltage-controlled tuning oscillator an output of which is coupled to the first phase detector on the one hand and to the first synchronous demodulator via a phase-shift circuit on the other hand for a direct demodulation of an RF reception signal to the frequency baseband, characterized in that the phase-shift circuit comprises a second phase-locked loop incorporating in a loop configuration a second phase detector which is coupled to said output of the first voltage-controlled oscillator, a second loop filter and a second voltage-controlled tuning oscillator an output of which is coupled on the one hand to the second phase detector and on the other hand to the first synchronous demodulator, the tuning of the first voltage-controlled tuning oscillator being coupled with that of the second voltage-controlled tuning oscillator.
Claim 3
Dependent Claim
54 words
A directly mixing synchronous receiver as claimed in Claim 1, characterized in that an output of the second loop filter is coupled to a scontrol input of the first voltage-controlled tuning oscillator for a phase control of the first tuning oscillator which is oppositely directed to the phase control of the second tuning oscillator.
Claim 4
Dependent Claim
57 words
A directly mixing synchronous receiver as claimed in Claim 1 or 2, characterized in that an output of the first loop filter is coupled to a control input of the second voltage-controlled tuning oscillator for a phase control of the second tuning oscillator which has the same direction as the phase control of the first tuning oscillator.
Claim 5
Dependent Claim
175 words
A directly mixing synchronous receiver as claimed in any one of Claims 1 to 3, characterized by a second signal path in which said RF reception signal is directly quadrature-demodulated to the baseband by means of the oscillator signal of the first voltage-controlled tuning oscillator, and a subsequent selection in a second low-pass filter, said first and second low-pass filters being coupled to a first and second modulators to which first and second auxiliary mixing carriers are applied, respectively, from a fixed oscillator circuit, the frequency of said carriers being higher than the highest frequency in the baseband modulation signal of the RF reception signal and the carriers being mutually in phase-quadrature, said two modulators being coupled to inputs of a superposition circuit for mutually adding or subtracting the output signals of the two modulators, said superposition circuit being coupled to a second synchronous demodulator to which one of said two auxiliary mixing carriers is applied, said second synchronous demodulator being connected to a baseband signal processing unit for applying the baseband modulation signal thereto.
Claim 6
Dependent Claim
50 words
A directly mixing synchronous receiver as claimed in Claim 4, characterized in that the first phase detector is arranged in the second signal path for said direct quadrature demodulation of the RF reception signal to the baseband and is coupled via the second low-pass filter to the first loop filter.
Claim 7
Dependent Claim
66 words
A directly mixing synchronous receiver as claimed in Claim 5, characterized in that a bandpass filter is arranged between the superposition circuit and the second synchronous demodulator, which bandpass filter is coupled to a third synchronous demodulator to which the second auxiliary mixing carrier is applied, said third synchronous demodulator being arranged in the first phase-locked loop and being coupled to the first loop filter thereof.
Claim 8
Dependent Claim
113 words
A directly mixing synchronous receiver as claimed in any one of Claims 4 to 6, characterized in that the fixed oscillator circuit has a third phase-locked loop comprising a phase detector, a loop filter and a controllable auxiliary oscillator and a further controllable auxiliary oscillator which is set at the same frequency as the first-mentioned controllable auxiliary oscillator a control input of which is coupled to an output of the loop filter for controlling its phase which is oppositely directed to the control of the phase of the first-mentioned auxiliary oscillator, and an output of which is coupled to the phase detector, said two auxiliary oscillators supplying the two said auxiliary mixing carriers.
Claim 9
Dependent Claim
109 words
A directly mixing synchronous receiver as claimed in any one of the preceding Claims, characterized in that the phase detectors arranged in the second and third phase-locked loops are symmetrical and comprise first and second balanced identical multiplier stages each having first, mutually corresponding inputs and second, mutually corresponding inputs, said first and second inputs of the first multiplier stage being coupled to the second and first inputs, respectively, of the second multiplier stage and to first and second inputs, respectively, of the phase detector, said multiplier stages being coupled to inputs of a superposition circuit an output of which is connected to the output of the phase detector.
References Cited (Backward Citations)
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