Patent EP0268138A2 successfully refreshed from Google Patents.
EP0268138A2
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Implementing privilege on microprocessor systems for use in software asset protection
Assignee: International Business Machines Corp
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Filing: 1987-11-03
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Granted: —
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Expires: 2007-11-03
Abstract
Abstract A dual privilege level coprocessor (20) especially suited for use in a software asset protection system comrises a supervisor processing element (201) and an application processing element (240) coupled by a bus (250). A high privilege read only memory (241) and a secure random access memory (240) are enabled only in response to dedicated control signals from the supervisor processor (210). While an application processor (247) has many general purpose computing capabilities, it is incapable of executing input or output operations. An input/output device (247) is also coupled to the bus and controlled by the supervisor processor. A secure random access memory (246) is provided for storage of sensitive information such as decryption keys. The coprocessor implements a low privilege level of operation for the purpose of executing protected software which is first decrypted under the control of the supervisor processor and then stored in the application processor random access memory (243). The coprocessor is also capable of high privilege operation either by the supervisor processor alone or with the supervisor processor controlling the application processor and its associated high privilege read only memory (241).
Inventors
- 👤 Thomas Joseph Nolan, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 16:07
CPC Classifications
G; G06; G06F; G06F21/00; G06F21/10; G06F21/12; G06F21/121; G06F21/123
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
160 words
A logically secure processor with an I/O terminal for input or output operations with security for protected data stored in said processor comprising: application processor means for executing software in accordance with a first set of executable operations, supervisor processor means coupled to and controlling said application processor means, a system bus coupled to both said supervisor and application processor means and to said I/O terminal, a secure read only memory device also coupled to said system bus and controlled by said supervisor processor means, said secure read only memory device having contents defining a second set of operations executable by said application processor means when said secure read only memory device is enabled by said supervisor processor means, whereby said application processor means, responsive to external commands via said system bus, is prohibited from performing operations requiring access to said secure read only memory device absent enablement of said secure read only memory device by said supervisor processor means.
Claim 2
Dependent Claim
160 words
A logically secure processor with an I/O terminal for input or output operations with security for protected data stored in said processor comprising: application processor means for executing software in accordance with a first set of executable operations, supervisor processor means coupled to and controlling said application processor means, a system bus coupled to both said supervisor and application processor means and to said I/O terminal, a secure read only memory device also coupled to said system bus and controlled by said supervisor processor means, said secure read only memory device having contents defining a second set of operations executable by said application processor means when said secure read only memory device is enabled by said supervisor processor means, whereby said application processor means, responsive to external commands via said system bus, is prohibited from performing operations requiring access to said secure read only memory device absent enablement of said secure read only memory device by said supervisor processor means.
Claim 3
Dependent Claim
65 words
The logically secure processor of claim 1 which further includes: a secure read/write memory device coupled to said system bus, said secure read/write memory device including means enabling response of said secure read/write memory device to signals on said system bus only on enablement by said supervisor processor means, whereby contents of said secure read/write memory device remain secure notwithstanding connection to said system bus.
Claim 4
Dependent Claim
19 words
The logically secure processor of claim 2 in which said secure read/write memory device is a non-volatile memory device.
Claim 5
Dependent Claim
39 words
A coprocessor implementing a software asset protection system requiring protection of application decryption keys comprising the logically secure processor as claimed in claim 2 which includes means to store said application decryption keys in said secure read/write memory device.
Claim 6
Dependent Claim
96 words
A coprocessor as claimed in claim 4 in which: said supervisor processor means includes means to enable reading of said secure read/write memory device to extract therefrom an application decryption key, said application processor means for executing software in accordance with a first set of executable operations includes general data processing capabilities, said secure read only memory device having contents defining a second set of operations executable by said application processor means includes at least decryption function means for decrypting an application relying on an application decryption key read, under control of said supervisor processor means.
Claim 7
Dependent Claim
55 words
A coprocessor as claimed in claim 5 in which said supervisor processor means includes: a dedicated read only memory device with contents defining a third set of executable instructions, and means for writing into said secure read/write memory device for storing and destroying application decryption keys in accordance with said third set of executable instructions.
Claim 8
Dependent Claim
26 words
A coprocessor as claimed in claim 6 in which said supervisor processor means includes means for fetching instructions exclusively from said dedicated read only memory device.
Claim 9
Dependent Claim
48 words
A compressor as claimed in claim 6 in which said application processor means includes an application read/write memory means for storing a decrypted application and wherein said supervisor processor means includes means to clear said application read/write memory means prior to each time an application is written therein.
Claim 10
Dependent Claim
201 words
A logically secure processor comprising: application processor means including an application microprocessor and application read only and read/write memory device for executing software stored in said application read/write memory device in accordance with contents of said application read only memory device, supervisor processor means including a supervisor microprocessor and associated memory devices coupled via a dedicated signal path, said supervisor processor means including a read only memory device with contents defining operations executable by said supervisor microprocessor, a system bus coupled to said application microprocessor, said supervisor microprocessor and to both said application read only and read/write memory devices, a secure read only memory device also coupled to said system bus with a control terminal driven by said supervisor processor means, said secure read only memory device having contents defining a secure set of operations executable by said application processor means when said secure read only memory device is enabled by said supervisor processor means, and means coupling said system bus for input/output operation, whereby said application processor means, responsive to external commands, is prohibited from performing operations requiring access to said secure read only memory device absent enablement of said secure read only memory device by said supervisor processor means.
Claim 11
Dependent Claim
201 words
A logically secure processor comprising: application processor means including an application microprocessor and application read only and read/write memory device for executing software stored in said application read/write memory device in accordance with contents of said application read only memory device, supervisor processor means including a supervisor microprocessor and associated memory devices coupled via a dedicated signal path, said supervisor processor means including a read only memory device with contents defining operations executable by said supervisor microprocessor, a system bus coupled to said application microprocessor, said supervisor microprocessor and to both said application read only and read/write memory devices, a secure read only memory device also coupled to said system bus with a control terminal driven by said supervisor processor means, said secure read only memory device having contents defining a secure set of operations executable by said application processor means when said secure read only memory device is enabled by said supervisor processor means, and means coupling said system bus for input/output operation, whereby said application processor means, responsive to external commands, is prohibited from performing operations requiring access to said secure read only memory device absent enablement of said secure read only memory device by said supervisor processor means.
Claim 12
Dependent Claim
77 words
The logically secure processor of claim 9 which further includes: a secure read/write memory device coupled to said system bus with a control terminal driven by said supervisor processor means, said secure read/write memory device including means preventing response of said secure read/write memory device to signals on said system bus in absence of enablement by said supervisor processor means, whereby contents of said a secure read/write memory device remain secure notwithstanding connection to said system bus.
Claim 13
Dependent Claim
19 words
The logically secure processor of claim 10 in which said secure read/write memory device is a non-volatile memory device.
Claim 14
Dependent Claim
39 words
A processor implementing a software asset protection system requiring protection of application decryption keys comprising the logically secure processor as claimed in claim 10 in which said secure read/write memory device includes means to store said application decryption keys.
Claim 15
Dependent Claim
95 words
A processor as claimed in claim 12 in which: said supervisor processor means includes means to enable reading said secure read/write memory device to extract therefrom an application decryption key, said application processor means for executing software in accordance with a first set of executable operations includes general data processing capabilities, said secure read only memory device having contents defining a second set of operations executable by said application processor means including at least decryption function means for decrypting an application relying on an application decryption key read, under control of said supervisor processor means.
Claim 16
Dependent Claim
56 words
A processor as claimed in claim 13 in which: said supervisor processor means includes a dedicated read only memory device with contents exclusively defining a third set of executable instructions, and means for writing into said secure read/write memory device for storing and destroying application decryption keys in accordance with said third set of executable instructions.
Claim 17
Dependent Claim
26 words
A processor as claimed in claim 14 in which said supervisor processor means includes means for fetching instructions exclusively from said dedicated read only memory device.
Claim 18
Dependent Claim
31 words
A processor as claimed in claim 15 in which said supervisor processor means includes means to clear said application read/write memory device prior to each time an application is written therein.
References Cited (Backward Citations)
No citation records indexed.
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