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EP0267447A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

A vertical DMOS power transistor with an integral operating condition sensor

Assignee: Vishay Siliconix Inc
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Filing: 1987-10-13
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Granted: —
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Expires: 2007-10-13
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Abstract

Abstract A vertical DMOS or IGBT cell structure with an integral operating condition sensor provided by a sensor region forming a PN junction 65 with an adjacent region of the cell and having a sensor region contact 75 for conducting a test current without interfering with normal operation of the cell.

Inventors

  • 👤 Richard A. Blanchard
  • 👤 David Cooper

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 17:22
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/66; H10D30/669; H10D12/00; H10D12/411; H10D12/441; H10D62/00; H10D62/10; H10D62/17; H10D62/393; H10D84/00; H10D84/101; H10D84/141; H10D84/143

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 111 words
A vertical DMOS cell structure having a first conductivity type substrate drain, and beneath the surface of the substrate at least one second conductivity type body region, and one within the body region a first conductivity type source region, said cell structure being characterized by comprising an operating condition sensor region adjacent, and of conductivity type opposite to, one of said regions of said cell, and having a contact for a conductive lead to bias the sensor region with respect to the adjacent region, for conducting a test current through, or a test voltage across the junction between the sensor region and the adjacent region while the cell is operating ordinarily.
Claim 2
Dependent Claim 111 words
A vertical DMOS cell structure having a first conductivity type substrate drain, and beneath the surface of the substrate at least one second conductivity type body region, and one within the body region a first conductivity type source region, said cell structure being characterized by comprising an operating condition sensor region adjacent, and of conductivity type opposite to, one of said regions of said cell, and having a contact for a conductive lead to bias the sensor region with respect to the adjacent region, for conducting a test current through, or a test voltage across the junction between the sensor region and the adjacent region while the cell is operating ordinarily.
Claim 3
Dependent Claim 21 words
The cell structure as claimed in Claim 1, further characterized in that said adjacent region is a laterally enlarged body region.
Claim 4
Dependent Claim 26 words
The structure as claimed in Claim 1, further characterized in that said adjacent region is a second body region separate from the first said body region.
Claim 5
Dependent Claim 26 words
The structure as claimed in Claim 3, further characterized in that said second body region is connected through overlying interconnect metallization to the first body region.
Claim 6
Dependent Claim 32 words
The structure as claimed in Claim 3, further characterized in that said second body region has a contact connected to a conductive lead separate from a contact to the first body region.
Claim 7
Dependent Claim 52 words
The structure as claimed in Claim 1, further characterized by comprising a sensor region of one conductivity type and an adjacent opposite conductivity type region both supported by dielectric over the surface of the substrate, and having respective contacts connected to conductive leads separate from leads to other regions of said cell.
Claim 8
Dependent Claim 58 words
The structure as claimed in Claim 1, further characterized in that the substrate includes a second conductivity type wafer and a first conductivity type epitaxial layer, the epitaxial layer provides said drain region, and said wafer, epitaxial layer, and first body region together form a bipolar transistor emitter, base, and collector, respectively, of an insulated gate bipolar transistor.

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