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Process of making insulated- gate field-effect transistors

Assignee: STMicroelectronics SRL
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Filing: 1987-10-29
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Granted: —
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Expires: 2007-10-29
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Abstract

Abstract Process of making insulated-gate field-effect transistors with junctions having an extremely low depth, comprising the steps of: forming a layer (18) of non-­monocrystalline semiconductor material on a fixed area of a monocrystalline substrate in which are defined the source (20) and drain (21) regions of an insulated-gate field-­effect transistor, and subsequent implantation of a doping agent into the layer of non-monocrystalline material (18). According to this process, a thermal oxidation is then carried out in order to convert the layer (18) into oxide and to transfer the implanted dopant into the substrate. Thus, one obtains heavily doped regions (20) and (21), self-aligned with the gate electrode, capable of forming the source and drain regions of the transistor.

Inventors

  • 👤 Laura Dr. Meda
  • 👤 Maria Luisa Dr. Polignano

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 22:35
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/017; H10D84/02; H10D84/03; H10D84/038; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; H10P95/00

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 277 words
A process for making an insulated-gate field-effect transistor on a first fixed area of a substrate (1) of semiconductor material, having a first type of conductivity, comprising the steps of: - forming a first insulating layer (4) on at least one second fixed area of said substrate (1), completely enclosing said first fixed area, - forming on a first region of said first fixed area a second insulating layer (5), - forming on said second insulating layer a conducting layer (6) and on said conducting layer a third insulating layer (7), the second insulating layer (7) and the conducting layer (6) capable of building up, respectively, a gate dielectric and a gate electrode of the transistor, and - forming insulating walls at least on the uncovered portions of the edges of the conducting layer, - defining in said first fixed area regions not covered by any layer, separated from each other, and capable of producing source and drain regions of the transistor, characterized by - successive operations to form in the area of at least said first fixed area a layer of non-­monocrystalline semiconductor material (18), - introducing through ion implantation at least into a portion of the layer of non-monocrystalline semiconductor material (18) impurities capable of producing in said layer a second type of conductivity opposite to said type of conductivity, and - a thermal oxidizing operation capable of converting at least a portion of the non-monocrys­talline semiconductor material (18) into insulating material, and transferring into the regions (20, 21) capable of forming source and drain regions of the transistor at least a portion of the impurities introduced into the layer of non-monocrystalline semiconductor material (18).
Claim 2
Dependent Claim 277 words
A process for making an insulated-gate field-effect transistor on a first fixed area of a substrate (1) of semiconductor material, having a first type of conductivity, comprising the steps of: - forming a first insulating layer (4) on at least one second fixed area of said substrate (1), completely enclosing said first fixed area, - forming on a first region of said first fixed area a second insulating layer (5), - forming on said second insulating layer a conducting layer (6) and on said conducting layer a third insulating layer (7), the second insulating layer (7) and the conducting layer (6) capable of building up, respectively, a gate dielectric and a gate electrode of the transistor, and - forming insulating walls at least on the uncovered portions of the edges of the conducting layer, - defining in said first fixed area regions not covered by any layer, separated from each other, and capable of producing source and drain regions of the transistor, characterized by - successive operations to form in the area of at least said first fixed area a layer of non-­monocrystalline semiconductor material (18), - introducing through ion implantation at least into a portion of the layer of non-monocrystalline semiconductor material (18) impurities capable of producing in said layer a second type of conductivity opposite to said type of conductivity, and - a thermal oxidizing operation capable of converting at least a portion of the non-monocrys­talline semiconductor material (18) into insulating material, and transferring into the regions (20, 21) capable of forming source and drain regions of the transistor at least a portion of the impurities introduced into the layer of non-monocrystalline semiconductor material (18).
Claim 3
Dependent Claim 19 words
The process as set forth in claim 1, characterized in that the non-­monocrystalline semiconductor material (18) is polycrystalline silicon.
Claim 4
Dependent Claim 19 words
The process as set forth in claim 1, characterized in that the non-monocrystalline semiconductor material (18) is amorphous silicon.

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