Patent EP0264283A2 successfully refreshed from Google Patents.
← Back to Patent Explorer
EP0264283A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Method of fabricating a complementary MOS integrated circuit device

Assignee: Canon Inc
•
Filing: 1987-10-15
•
Granted: —
•
Expires: 2007-10-15
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A complementary MOS integrated circuit device has an MOS transistor of one conductivity type formed on a semiconductor substrate and an MOS tran­sistor of another conductivity type opposite to the on conductivity type formed on the MOS transistor of one conductivity type through a separate layer. A hetero material whose nucleation density is sufficient­ly larger than that of the material of the separate layer and which is enough fine so that only a single necleus of a semiconductor layer material grows is provided on the separate layer. The MOS transistor of the opposite conductivity type is formed in a mono­crystalline semiconductor layer or substantial mono­crystalline semiconductor layer provided by growing around the single nucleus formed on the hetero material.

Inventors

  • 👤 Masaharu Ozaki
  • 👤 Takao Yonehara

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 20:01
CPC Classifications
H; H10; H10D; H10D88/00; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/02; H10D84/03; H10D84/038; H10D88/01; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/27; H10P14/271; H10P14/274; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/34; H10P14/3402; H10P14/3414; H10P14/3418; H10P14/3421

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 121 words
A complementary MOS integrated circuit device having an MOS transistor of one conductivity type formed on a semiconductor substrate and an MOS tran­sistor of another conductivity type opposite to said one conductivity type formed on said MOS transistor of one conductivity type through a separate layer, wherein a hetero material whose nucleation density is sufficiently larger than that of the material of said separate layer and which is enough fine so that only a single nucleus of a semiconductor layer material grows is provided on said separate layer, and the MOS transistor of the opposite conductivity type is formed in a monocrystalline semiconductor layer or substantial monocrystalline semiconductor layer provided by growing around the single nucleus formed on said hetero material.
Claim 2
Dependent Claim 121 words
A complementary MOS integrated circuit device having an MOS transistor of one conductivity type formed on a semiconductor substrate and an MOS tran­sistor of another conductivity type opposite to said one conductivity type formed on said MOS transistor of one conductivity type through a separate layer, wherein a hetero material whose nucleation density is sufficiently larger than that of the material of said separate layer and which is enough fine so that only a single nucleus of a semiconductor layer material grows is provided on said separate layer, and the MOS transistor of the opposite conductivity type is formed in a monocrystalline semiconductor layer or substantial monocrystalline semiconductor layer provided by growing around the single nucleus formed on said hetero material.
Claim 3
Dependent Claim 65 words
An integrated circuit comprising a first semiconductor electronic device, a layer covering the device and having a first nucleation density, a nucleation portion on the layer having a second nucleation density sufficiently different to that of the first density to act as a nucleus for forming a further monocrystalline layer of semiconductive material, and a second semiconductor electronic device formed in the further menocrystalline layer.
Claim 4
Dependent Claim 65 words
An integrated circuit comprising a first semiconductor electronic device, a layer covering the device and having a first nucleation density, a nucleation portion on the layer having a second nucleation density sufficiently different to that of the first density to act as a nucleus for forming a further monocrystalline layer of semiconductive material, and a second semiconductor electronic device formed in the further menocrystalline layer.
Claim 5
Independent Claim 75 words
A method of forming an integrated circuit, comprising forming a first semiconductor electronic device, providing a first layer over the device having a first nucleation density, providing a nucleation portion on the layer, the nucleation portion having a second nucleation density different to the first density, forming a second substantially monocrystalline layer of semiconductive material around the nucleation portion over the said first layer, and forming a second semiconductor electronic device in the second layer.
Claim 6
Independent Claim 75 words
A method of forming an integrated circuit, comprising forming a first semiconductor electronic device, providing a first layer over the device having a first nucleation density, providing a nucleation portion on the layer, the nucleation portion having a second nucleation density different to the first density, forming a second substantially monocrystalline layer of semiconductive material around the nucleation portion over the said first layer, and forming a second semiconductor electronic device in the second layer.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag