Patent EP0260618A2 successfully refreshed from Google Patents.
EP0260618A2
Expired / Lapsed
EP
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Method and device for obtaining sum of products using integrated circuit
Assignee: Fujitsu Ltd
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Filing: 1987-09-11
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Granted: —
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Expires: 2007-09-11
Abstract
Abstract The present invention relates to a method and a device for obtaining a sum of products which are applied to a spatial filter in a picture processing system, a transversal equalizer in a radio communication equipment or the like, wherein a portion of or entire operand is divided by a predetermined figure length, the calculation of the sum of products is first performed among the operands having the same figure position, the obtained results are added while shifting the figure in response to the divided figure length and the figure position, and the lower figures, which do not need to be added, are appended under the lowest figure of the addition result as is. Thus the scale of the figure processed in an IC is decreased and the application of an identical rating IC is further promoted.
Inventors
- 👤 Takashi2-3-26 Shimoshinjo Nakahara-Ku Aoki
- 👤 Yasushi Inamoto
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 16:33
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/50; G06F7/52; G06F7/523; G06F7/53; G06F7/5324; G06F7/533; G06F7/5334; G06F7/5336; G06F7/5338; G06F7/544; G06F7/5443; G06F2207/00; G06F2207/38; G06F2207/3804; G06F2207/386; G06F2207/3884
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
133 words
A method for obtaining a sum of a products wherein when products between a pair of operands to be multiplied are calculated for a plurality of pairs and a sum for a plurality of products is calculated, calculating of a sum of products is carried out using a predetermined multiplier means and adders to sum the products; comprising the following steps of: dividing at least a portion of the operands to be multiplied into a plurality of divisions having a predetermined figure length; obtaining a sum of products in each pair of operands having the same figure position as a group; and adding, by another adder, the sums of products calculated group by group while shifting a figure position of the sums corresponding to a figure position of the operands in the group.
Claim 2
Independent Claim
133 words
A method for obtaining a sum of a products wherein when products between a pair of operands to be multiplied are calculated for a plurality of pairs and a sum for a plurality of products is calculated, calculating of a sum of products is carried out using a predetermined multiplier means and adders to sum the products; comprising the following steps of: dividing at least a portion of the operands to be multiplied into a plurality of divisions having a predetermined figure length; obtaining a sum of products in each pair of operands having the same figure position as a group; and adding, by another adder, the sums of products calculated group by group while shifting a figure position of the sums corresponding to a figure position of the operands in the group.
Claim 3
Dependent Claim
52 words
A method as claimed in claim 1, further comprising the following steps of bypassing lower figures applied to said other adder, which need not be added due to the figure position of the sums, and appending the bypassed lower figures under the lowest figures of said addition result by said other adder.
Claim 4
Dependent Claim
37 words
A method as claimed in claim 1 wherein the division of the operands comprising a multiplicand and a multiplier, is two bits by two bits for the multiplicand and four bits by four bits for the multiplier.
Claim 5
Dependent Claim
20 words
A method as claimed in claim 1 wherein the multiplier means for the multiplying calculation uses an extended Booth algorithm.
Claim 6
Independent Claim
165 words
A device for obtaining a sum of products comprising: a plurality of integrated circuits (1), each including a plurality of multiplier means (2-o to 2-n), an adder group (3) for adding products calculated by the multiplier means (2-0 to 2-n), and an adder (4) having an external input, for adding the sum from the adder group (3) to calculated result obtained from a preceding stage integrated circuit; wirings by which at least a portion of a multiplicand (x) and a multiplier (y) to be calculated is divided by a predetermined number of figures, the divided figures are supplied to the multiplier means (2-o to 2-n), and the products of the multiplicand and the multiplier having the same figure position are added; and by which the results of sum of products in each integrated circuit are supplied to the external input of the next stage integrated circuit with a figure shift in response to the figure position of the multiplicand and the multiplier without lower figures.
Claim 7
Independent Claim
165 words
A device for obtaining a sum of products comprising: a plurality of integrated circuits (1), each including a plurality of multiplier means (2-o to 2-n), an adder group (3) for adding products calculated by the multiplier means (2-0 to 2-n), and an adder (4) having an external input, for adding the sum from the adder group (3) to calculated result obtained from a preceding stage integrated circuit; wirings by which at least a portion of a multiplicand (x) and a multiplier (y) to be calculated is divided by a predetermined number of figures, the divided figures are supplied to the multiplier means (2-o to 2-n), and the products of the multiplicand and the multiplier having the same figure position are added; and by which the results of sum of products in each integrated circuit are supplied to the external input of the next stage integrated circuit with a figure shift in response to the figure position of the multiplicand and the multiplier without lower figures.
Claim 8
Dependent Claim
81 words
A device as claimed in claim 5, further comprising wirings by which the results of sum of products in each integrated circuit are supplied to an adder for receiving the result of the final stage of the integrated circuits, for directly receiving lower figures of a result of a sum of products in each integrated circuit, which lower figures do not need to be added by the next stage integrated circuit, and a portion of the lower figures bypasses the adder.
Claim 9
Dependent Claim
49 words
A device as claimed in claim 5, comprising eight integrated circuits (1-1 to 1-8) each having nine multiplier means, wherein said sum of products of nine pairs of multiplicands and multipliers are calculated, and the multiplicand is divided by two bits and the multiplier is divided by four bits.
Claim 10
Dependent Claim
21 words
A device as claimed in claim 5, wherein the multiplier means are multipliers (2-o to 2-8) using an extended Booth algorithm.
References Cited (Backward Citations)
No citation records indexed.
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