Integrated circuit having two circuit blocks therein independently energized through different power supply terminals

Claim 2

An integrated circuit comprising: a semiconductor body; first and second circuit blocks formed on said semiconductor body, said first and second circuit blocks operating separately; first and second power supply terminals formed on said semiconductor body to supply a power voltage to said first circuit block; third and fourth power supply terminals formed on said semiconductor body to supply a power voltage to said second circuit block, said first and third power supply terminals being coupled to said first and second circuit blocks but having no direction connection, and said second and fourth power source terminals being coupled to said first and second circuit blocks and coupled each other through said semiconductor body; and a pair of first and second diodes connected in parallel between said second and fourth power source terminals, an anode of said first diode being connected with a cathode of said second diode and a cathode of said first diode being connected with an anode of said second diode.

Claim 3

An integrated circuit as claimed in claim 1, wherein said integrated circuit further comprises a third diode connected between said first and second power supply terminals and having such a breakdown voltage that circuit elements in said first circuit block can be protected from being damaged by an applicable voltage between said first and second power supply terminals, and a fourth diode connected between said third and fourth power supply terminals and having such another breakdown voltage that circuit elements in said second circuit block can be protected from being damaged by another applicable voltage between said third and fourth power supply terminals.

Claim 4

An integrated circuit as claimed in claim 2, wherein said integrated circuit further comprises third and fourth diodes connected in parallel between said first and third power supply terminals, an anode of said third diode being connected with a cathode of said fourth diode and a cathode of said third diode being connected with an anode of said fourth diode.

Claim 5

An integrated circuit as claimed in claim 1, wherein said first and second circuit blocks have input MOS field effect transistors having a gate electrode and wherein said integrated circuit further comprises at least one first input terminal connected to said gate electrode of said MOS field effect transistor in said first circuit block, a first gate protection diode connected between said first input terminal and said first power supply terminal, a second gate protection diode connected between said first input terminal and said second power supply terminal, at least one second input terminal connected to said gate electrode of said MOS field effect transistor in said second circuit block, a third gate protection diode connected between said second input terminal and said third power supply terminal, and a fourther gate protection diode connected between said second input terminal and said fourth power supply terminal.

Claim 6

An integrated circuit as claimed in claim 4, wherein said integrated circuit further comprises still another parallel connection of fifth and sixth diodes connected between said first and third power supply terminals, an anode of said fifth diode being connected with a cathode of said sixth diode, and a cathode of said fifth diode being connected with an anode of said sixth diode.

Claim 7

An integrated circuit as claimed in claim 1, wherein said first and second circuit blocks respectively have an electrical circuit formed of P-channel type and N-channel type MOS field effect transistors, and said semiconductor body has a semiconductor substrate of one conductivity type and well regions of another conductivity type formed on said semiconductor substrate, said second and fourth power supply terminals being coupled through said semiconductor substrate.

Claim 8

An integrated circuit as claimed in claim 5, wherein said first and second circuit blocks respectively have an electrical circuit formed of P-channel and N-channel type MOS field effect transistors, and said semiconductor body has a semiconductor substrate of one conductivity type and well regions of another conductivity type formed on said semiconductor substrate, said second and fourth power supply terminals being coupled through said semiconductor substrate.

Claim 9

A MOS integrated circuit comprising: a semiconductor body; first and second circuit blocks formed on said semiconductor body to operate separately with different power supply, said first and second circuit blocks including independent electrical circuits which are formed of P-channel type and N-channel type MOS field effect transistors having a gate electrode; first and second power supply terminals connected to said first circuit block to supply a first power voltage; third and fourth power supply terminals connected to said second circuit block to supply a second power voltage, said second and fourth power supply terminals being coupled through said semiconductor substrate; a first power protection diode connected between said first and second power supply terminals; a second power protection diode connected between said third and fourth power supply terminals; at least one first input terminal connected with said gate electrode of said MOS field effect transistor in said first circuit block; a first gate protection diode connected between said first input terminal and said first power supply terminal; a second gate protection diode connected between said first input terminal and said second power supply terminal; at least one second input terminal connected said gate electrode of said MOS field effect transistor in said second circuit block; a third gate protection diode connected between said second input terminal and said third power supply terminal; a fourth gate protection diode connected between said second input terminal and said fourth power supply terminal; and a parallel connection of first and second diodes connected between said second and fourth power supply terminals, an anode of said first diode being connected with a cathode of said second diode, and a cathode of said first diode being connected with an anode of said second diode.

Claim 10

A MOS integrated circuit comprising: a semiconductor body; first and second circuit blocks formed on said semiconductor body to operate separately with different power supply, said first and second circuit blocks including independent electrical circuits which are formed of P-channel type and N-channel type MOS field effect transistors having a gate electrode; first and second power supply terminals connected to said first circuit block to supply a first power voltage; third and fourth power supply terminals connected to said second circuit block to supply a second power voltage, said second and fourth power supply terminals being coupled through said semiconductor substrate; a first power protection diode connected between said first and second power supply terminals; a second power protection diode connected between said third and fourth power supply terminals; at least one first input terminal connected with said gate electrode of said MOS field effect transistor in said first circuit block; a first gate protection diode connected between said first input terminal and said first power supply terminal; a second gate protection diode connected between said first input terminal and said second power supply terminal; at least one second input terminal connected said gate electrode of said MOS field effect transistor in said second circuit block; a third gate protection diode connected between said second input terminal and said third power supply terminal; a fourth gate protection diode connected between said second input terminal and said fourth power supply terminal; and a parallel connection of first and second diodes connected between said second and fourth power supply terminals, an anode of said first diode being connected with a cathode of said second diode, and a cathode of said first diode being connected with an anode of said second diode.

Claim 11

The MOS integrated circuit as claimed in claim 8, wherein said first and second power protection diodes have such breakdown voltages that said MOS field effect transistors in said first and second circuit blocks can be respectively protected from being broken down by applicable voltages between said first and second power supply terminals and between said third and fource power supply terminals, and first to fourth gate protection diodes respectively have such a breakdown voltage that said gate electrode of said MOS field effect transistors connected to said first and second input terminals can be protected from being damaged by externally applicable voltages to said first and seocnd input terminals.

Claim 12

The MOS integrated circuit as claimed in claim 9, wherein said MOS integrated circuit further comprises another parallel connection of third and fourth diodes connected between said first and third power supply terminals, an anode of said third diode being connected with a cathode of said fourth diode and a cathode of said third diode being connected with an anode of said fourth diode.