Metallization for integrated-circuit arrangements

Abstract

Abstract The proposed sandwich metallisation used for interconnection systems of integrated circuit arrangements and having a layer sequence consisting of platinum silicide (2) and a plurality of titanium/tungsten or titanium nitride layers (3, 5, 7) separated from one another by aluminium or aluminium/silicon layers with and without alloying additives (4, 6) has advantages over known metallisations in relation to current-carrying capacity, hillock formation and interconnection defects and offers the possibilities of selective etching, sloping etch edges and substantial space saving in multilayer metallisations. <IMAGE>

Inventors

• 👤 Harald Dipl.-Ing. Eggers
• 👤 Wilhelm Dipl.-Phys. Asam
• 👤 Walter Dipl.-Ing. Preis (FH)
• 👤 Dietrich Ing. Schloss (FH)
• 👤 Elke Eckstein

Bibliographic Details