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EP0241948A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Semiconductor memory and method for fabricating the same

Assignee: Hitachi Ltd
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Filing: 1983-02-09
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Granted: —
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Expires: 2003-02-09
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Abstract

Abstract In a semiconductor memory a capacitor (1) is formed by utilizing a groove (17) formed in a semiconductor substrate (10). The sidewalls of the groove are covered by an insulating layer consisting of a first (18) and a second (19) insulating film. The interior of the groove is filled with conductive material. An area occupied by each memory cell can be made very small and a distance between the memory cells can also be made very small, accordingly, high denisty integration is facilitated.

Inventors

  • 👤 Hideo Sunami
  • 👤 Tokuo Kure
  • 👤 Yoshifumi Kawamoto

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 16:16
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/403; G11C11/404; H; H10; H10B; H10B12/00; H10B12/30; H10B12/37

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 222 words
A semiconductor memory which is formed in a semiconductor substrate comprising: capacitors (1) for storing information; insulated-gate field effect transistors (2) for reading out the signal charges stored in said capcitors; word lines (41, 42) for applying signals to a gate electrode (4) of the insulated-gate field effect transistors; and data lines (3, 31, 32) for reading out the information stored in said capacitors (1); wherein the capacitors (1) each include electrodes (24) formed at the side walls of one of a plurality of recesses provided in the semiconductor substrate, wherein the side walls of each of the recesses are covered by an insulating layer and a layer of conductive material is formed over said insulating layer to form a capacitor plate (82) separated from said side walls of the recesses by said insulating layer, wherein a source or drain of each of said insulated-gate field effect transistors is respectively connected to one of said electrodes (24, 82) of the recess, wherein a drain or source of each of said insulated-gate field effect transistors is connected to one of said data lines, wherein the gate electrode of each of said insulated-gate field effect transistors is connected to one of said word lines, characterized in that the insulating layer has at least a first insulating film (18) and a second insulating film (19).
Claim 2
Dependent Claim 222 words
A semiconductor memory which is formed in a semiconductor substrate comprising: capacitors (1) for storing information; insulated-gate field effect transistors (2) for reading out the signal charges stored in said capcitors; word lines (41, 42) for applying signals to a gate electrode (4) of the insulated-gate field effect transistors; and data lines (3, 31, 32) for reading out the information stored in said capacitors (1); wherein the capacitors (1) each include electrodes (24) formed at the side walls of one of a plurality of recesses provided in the semiconductor substrate, wherein the side walls of each of the recesses are covered by an insulating layer and a layer of conductive material is formed over said insulating layer to form a capacitor plate (82) separated from said side walls of the recesses by said insulating layer, wherein a source or drain of each of said insulated-gate field effect transistors is respectively connected to one of said electrodes (24, 82) of the recess, wherein a drain or source of each of said insulated-gate field effect transistors is connected to one of said data lines, wherein the gate electrode of each of said insulated-gate field effect transistors is connected to one of said word lines, characterized in that the insulating layer has at least a first insulating film (18) and a second insulating film (19).
Claim 3
Dependent Claim 33 words
The semiconductor memory according to claim 1, characterized in that the first insulating film is comprises of SiO 2 and the second insulating film is comprised of S i 3 N 4 .
Claim 4
Dependent Claim 22 words
The semiconductor memory according to claim 1 or claim 2, wherein said plate electrode (8) is made chiefly of highly doped poly-silicon.
Claim 5
Independent Claim 72 words
A method for fabricating a semiconductor memory of any of the claims 1 to 3,characterized by the steps of: a) forming an insulation film (11, 111) on a semiconductor substrate (10); b) forming a groove (17) at a selected area of said semiconductor substrate (10) through said insulation film (11, 111); c) depositing an insulation film (18, 19) and a conductive film (8) in stack on the surface of said groove (17).
Claim 6
Dependent Claim 20 words
A method for fabricating a semiconductor memory according to claim 4 wherein said conductive film is chiefly made of poly-silicon.
Claim 7
Dependent Claim 49 words
A method for fabricating a semiconductor memory according to claim 4 or claim 5, wherein an impurity having the opposite conductivity type to said semiconductor substrate is introduced into the surface area (29) of said semiconductor substrate prior to the formation of said insulation film in said step (1).

References Cited (Backward Citations)

WO1981003241A1 Cited

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