Patent EP0241699A2 successfully refreshed from Google Patents.
EP0241699A2
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EP
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Semiconductor memory device using junction short type programmable element
Assignee: Fujitsu VLSI Ltd
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Filing: 1987-03-09
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Granted: —
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Expires: 2007-03-09
Abstract
Abstract A semiconductor memory device using a junction short type programmable element comprises an epitaxial layer (l2) formed on a semiconductor substrate (ll), the epitaxial layer having an opposite conductive type to that of the semiconductor substrate,the epitaxial layer being a collector region; a base region (l4) having the same conductive type as the substrate formed in the epitaxial layer; a first emitter region (l5) having an opposite conductive type to that of the base region, formed in the base region; an insulating isolation region (l3), formed in said epitaxial layer and around the base region; a second emitter region (l5a) having a higher impurity concentration than that of the first emitter region and the same conductive type as the of the first emitter region, formed in the first emitter region in such a manner that the second emitter region penetrate the first emitter region upward and downward and extends to the interior of the base region (l4) so that a writing current flows concentratedly at the second emitter region.
Inventors
- 👤 Kouji Ueno
- 👤 Takamitsu Naito
- 👤 Yoshitaka Nakajima
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 17:12
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/16; H; H10; H10B; H10B69/00; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/133
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
167 words
A semiconductor memory device using a junction short type programmable element comprising: an epitaxial layer (l2) formed on a semiconductor substrate (ll), said epitaxial layer having an opposite conductive type to that of the semiconductor substrate, said epitaxial layer being a collector region; a base region (l4) having the same conductive type as the substrate formed in the epitaxial layer, a first emitter region (l5) having an opposite conductive type to that of the base region, formed in the base region (l4), an insulating isolation region (l3), formed in said epitaxial layer and around the base region, a second emitter region (l5a) having a higher impurity concentration than that of said first emitter region (l5) and the same conductive type as that of the first emitter region, formed at the bottom portion of the first emitter region in such a manner that said second emitter region extends to the interior of the base region (l4), so that a writing current flows concentratedly at the second emitter region.
Claim 2
Dependent Claim
167 words
A semiconductor memory device using a junction short type programmable element comprising: an epitaxial layer (l2) formed on a semiconductor substrate (ll), said epitaxial layer having an opposite conductive type to that of the semiconductor substrate, said epitaxial layer being a collector region; a base region (l4) having the same conductive type as the substrate formed in the epitaxial layer, a first emitter region (l5) having an opposite conductive type to that of the base region, formed in the base region (l4), an insulating isolation region (l3), formed in said epitaxial layer and around the base region, a second emitter region (l5a) having a higher impurity concentration than that of said first emitter region (l5) and the same conductive type as that of the first emitter region, formed at the bottom portion of the first emitter region in such a manner that said second emitter region extends to the interior of the base region (l4), so that a writing current flows concentratedly at the second emitter region.
Claim 3
Dependent Claim
43 words
A semiconductor memory device according to claim l, wherein the base region is defined by the insulating isolation region and the first emitter region is defined by a smaller insulating layer window than the insulating isolation region, positioned inside the insulating isolation region.
Claim 4
Dependent Claim
42 words
A semiconductor memory device according to claim l, wherein said first emitter region (l5) and the second emitter region (l5a) have an impurity concentration of l × to l0¹⁸ to l × l0¹⁹/cm³ and l × l0²⁰ to l × l0²¹/cm³ respectively.
Claim 5
Dependent Claim
61 words
A semiconductor memory device according to claim l, wherein the base region (l4) has a width of about l0 µ and depth of about l.2 µ, the first emitter region (l5) has a width of about 3 µ and depth of 0.36 µ, and the second emitter region (l5a) has a width of about 0.3 µ and depth of 0.5 µ.
Claim 6
Dependent Claim
24 words
A semiconductor memory device according to claim l, wherein the base region and the first emitter region are defined by the insulating isolation region.
Claim 7
Dependent Claim
25 words
A semiconductor memory device according to claim l, wherein the base region and the first emitter region have the same width of about 4 µ.
Claim 8
Dependent Claim
166 words
A semiconductor memory device using a junction short type programmable element comprising: an epitaxial layer (l2) formed on a semiconductor substrate (ll), said epitaxial layer having an opposite conductive type to that of the semiconductor substrate, said epitaxial layer being a collector region; a first base region (l4) having the same conductive type formed in the epitaxial layer, an emitter region is having an opposite conductive type to that of the base region, formed in the base region, an insulating isolation region (l3), isolating the formed in the epitaxial layer and around the base region, a second base region (l4a) having a higher impurity concentration than that of said first base region (l4) and having the same conductive type as that of the first base region, formed at the bottom portion of the first base region in such a manner that said second base region extends to the interior of the epitaxial layer (l2), so that a writing current flows concentratedly at the second emitter region.
Claim 9
Dependent Claim
166 words
A semiconductor memory device using a junction short type programmable element comprising: an epitaxial layer (l2) formed on a semiconductor substrate (ll), said epitaxial layer having an opposite conductive type to that of the semiconductor substrate, said epitaxial layer being a collector region; a first base region (l4) having the same conductive type formed in the epitaxial layer, an emitter region is having an opposite conductive type to that of the base region, formed in the base region, an insulating isolation region (l3), isolating the formed in the epitaxial layer and around the base region, a second base region (l4a) having a higher impurity concentration than that of said first base region (l4) and having the same conductive type as that of the first base region, formed at the bottom portion of the first base region in such a manner that said second base region extends to the interior of the epitaxial layer (l2), so that a writing current flows concentratedly at the second emitter region.
Claim 10
Dependent Claim
43 words
A semiconductor memory device according to claim 7, wherein the base region is defined by the insulating isolation region and the first emitter region is defined by a smaller insulating layer window than the insulating isolation region, positioned inside the insulating isolation region.
Claim 11
Dependent Claim
23 words
A semiconductor memory device according to claim 7, wherein the base region and the emitter region are defined by the insulating isolation region.
Claim 12
Dependent Claim
228 words
l0. A semiconductor memory device using a junction short type programmable element comprising: an epitaxial layer (l2) formed on a semiconductor substrate (ll), said epitaxial layer having an opposite conductive type to that of the semiconductor substrate, said epitaxial layer being a collector region, a first base region (l4) having the same conductive type as the substrate formed in the epitaxial layer, a first emitter region (l5) having an opposite conductive type to that of the base region, formed in the first base region (l4), an insulating isolation region (l3), formed in said epitaxial layer and around the first base region, a second base region (l4a) having a higher impurity concentration than that of said first base region (l4) and having the same conductive type as that of the first base region, formed at the bottom portion of the first base region in such a manner that said second base region extends to the interior of the epitaxial layer (l2). a second emitter region (l5a) having a higher impurity concentration than that of said first emitter region (l5) and having the same conductive type as that of the first emitter region, formed in the first emitter region in such a manner that said second emitter region extends to the interior of the second base region (l4a) so that a writing current flows concentratedly at the second emitter region.
Claim 13
Dependent Claim
228 words
l0. A semiconductor memory device using a junction short type programmable element comprising: an epitaxial layer (l2) formed on a semiconductor substrate (ll), said epitaxial layer having an opposite conductive type to that of the semiconductor substrate, said epitaxial layer being a collector region, a first base region (l4) having the same conductive type as the substrate formed in the epitaxial layer, a first emitter region (l5) having an opposite conductive type to that of the base region, formed in the first base region (l4), an insulating isolation region (l3), formed in said epitaxial layer and around the first base region, a second base region (l4a) having a higher impurity concentration than that of said first base region (l4) and having the same conductive type as that of the first base region, formed at the bottom portion of the first base region in such a manner that said second base region extends to the interior of the epitaxial layer (l2). a second emitter region (l5a) having a higher impurity concentration than that of said first emitter region (l5) and having the same conductive type as that of the first emitter region, formed in the first emitter region in such a manner that said second emitter region extends to the interior of the second base region (l4a) so that a writing current flows concentratedly at the second emitter region.
Claim 14
Dependent Claim
44 words
A semiconductor memory device according to claim l0, wherein the base region is defined by the insulating isolating isolation region and the first emitter region is defined by a smaller insulating layer window than the insulating isolation region, positioned inside the insulating isolation region.
Claim 15
Dependent Claim
24 words
A semiconductor memory device according to claim l0, wherein the base region and the first emitter region are defined by the insulating isolation region.
References Cited (Backward Citations)
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