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EP0239652A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Method of producing a monolithic integrated circuit with at least one bipolar planar transistor

Assignee: TDK Micronas GmbH
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Filing: 1986-03-22
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Granted: —
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Expires: 2006-03-22
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Abstract

Abstract Translated from German Das Verfahren nach der Erfindung ermöglichst die Herstellung von monotlithisch integrierten VLSI-Schaltungen mit Bipolartransistoren, deren Basiszonen (5) selbstausrichtend in unmittelbarer Nähe der betreffenden Emitterzone (4) mittels Silicidschichten (17) kontakiert werden, wobei von einem Verfahren ausgegangen wird, welches bei Verwendung eines den Emitterbereich des Planartransistors abdeckenden Isolationsmaskierungsschichtteil die selbstausrichtende Herstellung von Emitterzone (4) zur angrenzenden Basiszone (5) und zur Basiskontaktierungszone (5') möglich ist. Weiterbildungen des Verfahrens nach der Erfindung ermöglichen die gleichzeitige Herstellung von mitintegrierten CMOS-Schaltkreisen und von polykristallinen Si-Leiterbahnen, deren Widerstände durch Silicidschichten erniedrigt sind. The method according to the invention enables the production of monotlithically integrated VLSI circuits with bipolar transistors, the base zones (5) of which are contacted in a self-aligning manner in the immediate vicinity of the emitter zone (4) in question by means of silicide layers (17), a method being assumed which is used of an insulation masking layer part covering the emitter region of the planar transistor, self-aligning production of emitter zone (4) to the adjacent base zone (5) and to the base contacting zone (5 ') is possible. Further developments of the method according to the invention enable the simultaneous production of integrated CMOS circuits and of polycrystalline Si conductor tracks, the resistances of which are reduced by silicide layers.

Inventors

  • 👤 Lothar Dipl.-Phys. Blossfeld

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-01 20:16
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/069; H10D; H10D10/00; H10D10/01; H10D10/051; H10D84/00; H10D84/01; H10D84/0107; H10D84/0109; H10D84/02; H10D84/03; H10D84/038; H10P; H10P76/00; H10P76/40; Y; Y10; Y10S; Y10S148/00; Y10S148/009; Y10S148/011

Claims Analysis

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References Cited (Backward Citations)

EP0071665A1 Cited
EP0101000A2 Cited
FR2531812A1 Cited
EP0139266A2 Cited

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