Patent EP0236967B1 successfully refreshed from Google Patents.
EP0236967B1
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EP
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Circuit arrangement for controlling a mosfet with a load connected to its source
Assignee: Siemens AG
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Filing: 1987-03-06
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Granted: 1990-06-13
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Expires: 2007-03-06
Abstract
No abstract record available.
Inventors
- 👤 Jenö Dr. Ing. Tihanyi
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 18:13
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/687; H03K17/06; H03K17/063; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10D84/403; H10D84/406
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
293 words
Circuit arrangement for driving a MOSFET having a load connected between the source terminal and ground, having the features: a) the drain terminal of the MOSFET is connected to an output terminal, b) the output terminal can be connected to one polarity of an operating voltage source, c) there is a switch between the gate terminal of the MOSFET and ground, d) there are two diodes connected in series in the gate line of the MOSFET, e) the series circuit is provided with a central tap which is provided with one terminal of a capacitor, f) the other terminal is connected to a first terminal, to which a clocked d.c. voltage can be applied, characterized by the features: g) the series circuit of the diodes (D 1, D 2) is connected to the aforesaid output terminal (4) via the drain-source path of a second MOSFET (T 2), h) the second MOSFET is of a channel type opposite to that of the first MOSFET (T 1) and its source terminal is connected to the output terminal (4), i) a resistor (R 1) is connected between source terminal and the gate terminal of the second MOSFET, k) the source-drain path of a third MOSFET (T 3) of a channel type corresponding to the first MOSFET is connected between gate terminal of the second MOSFET and ground, I) the gate terminal of the third MOSFET is connected to a second input terminal (2), m) the switch is formed by a fourth MOSFET (T 4) of a channel type corresponding to the first MOSFET, n) the gate terminal of the fourth MOSFET is connected to a third input terminal (3), o) inversely related logical signals can be applied to the second and third input terminal (2, 3).
Claim 2
Dependent Claim
293 words
Circuit arrangement for driving a MOSFET having a load connected between the source terminal and ground, having the features: a) the drain terminal of the MOSFET is connected to an output terminal, b) the output terminal can be connected to one polarity of an operating voltage source, c) there is a switch between the gate terminal of the MOSFET and ground, d) there are two diodes connected in series in the gate line of the MOSFET, e) the series circuit is provided with a central tap which is provided with one terminal of a capacitor, f) the other terminal is connected to a first terminal, to which a clocked d.c. voltage can be applied, characterized by the features: g) the series circuit of the diodes (D 1, D 2) is connected to the aforesaid output terminal (4) via the drain-source path of a second MOSFET (T 2), h) the second MOSFET is of a channel type opposite to that of the first MOSFET (T 1) and its source terminal is connected to the output terminal (4), i) a resistor (R 1) is connected between source terminal and the gate terminal of the second MOSFET, k) the source-drain path of a third MOSFET (T 3) of a channel type corresponding to the first MOSFET is connected between gate terminal of the second MOSFET and ground, I) the gate terminal of the third MOSFET is connected to a second input terminal (2), m) the switch is formed by a fourth MOSFET (T 4) of a channel type corresponding to the first MOSFET, n) the gate terminal of the fourth MOSFET is connected to a third input terminal (3), o) inversely related logical signals can be applied to the second and third input terminal (2, 3).
Claim 3
Dependent Claim
99 words
Integrated circuit arrangement of the diodes according to claim 1, characterized by a semiconductor substrate (5), in which a lateral MOSFET having a source zone (11), a drain zone (10) and a gate zone (8) is embedded, the gate electrode (12) of which is connected to the drain zone (10); by a vertical bipolar transistor having an emitter zone (13), a base zone (9), a collector zone formed by the substrate (5), and having low current amplification; by a resistor (R 2) connected between source zone and emitter zone; and by a terminal (a) at the base zone (9).
Claim 4
Dependent Claim
24 words
Integrated circuit arrangement according to claim 2, characterized in that the gate zone (8) and the base zone (9) form a single, continuous zone.
Claim 5
Dependent Claim
25 words
Integrated circuit arrangement according to claim 3, characterized in that the base zone (8) is thicker and more heavily doped than the gate zone (9).
References Cited (Backward Citations)
No citation records indexed.
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