Patent EP0233373A2 successfully refreshed from Google Patents.
EP0233373A2
Expired / Lapsed
EP
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Programmable communication card
Assignee: International Business Machines Corp
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Filing: 1986-12-23
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Granted: —
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Expires: 2006-12-23
Abstract
Abstract A multi-protocol communications adapter (MPCA) used to interconnect a Local Area Network to a communications highway including a plurality of protocol controllers (20, 22, 24), each one of the controllers being operable for converting a data stream into a predetermined format and a configuration logic circuit (18) for selecting one of the protocol controllers, a controlled interface (26, 28, 30) being provided for gating the selected controller onto the communications highway. The MPCA is packaged as a card or module, and it is coupled to a primary computer that controls the Local Area Network. The primary computer may effectuate a protocol change by changing the contents of the configuration register. Thus, the MPCA can be used with a pre-existing primary computer without significantly changing the architecture and/or programming of said computer.
Inventors
- 👤 Howard Kazan
- 👤 Ronald William Kohake
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 18:26
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F13/382; G06F13/387
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
146 words
A multi-protocol communications adapter device for interfacing a processor with a modem for providing communication between said processor and a remote host computer, characterized in that it comprises: a configuration control logic circuit means (18) coupled to said processor, said configuration control logic circuit means including a configuration register (2) for accepting control data from said processor and for generating a plurality of control signals therefrom; an address decoding means (17) coupled to an address bus (14) of said processor, said address decoding means being responsive to the control signals and operable for outputting enabling signals whenever a predetermined address range is being decoded on the address bus; and a plurality of protocol conversion controllers (20, 22, 24), each one being responsive to the enabling signals and operable for receiving or transmitting a data stream and for converting said data stream into a predetermined protocol format.
Claim 2
Dependent Claim
146 words
A multi-protocol communications adapter device for interfacing a processor with a modem for providing communication between said processor and a remote host computer, characterized in that it comprises: a configuration control logic circuit means (18) coupled to said processor, said configuration control logic circuit means including a configuration register (2) for accepting control data from said processor and for generating a plurality of control signals therefrom; an address decoding means (17) coupled to an address bus (14) of said processor, said address decoding means being responsive to the control signals and operable for outputting enabling signals whenever a predetermined address range is being decoded on the address bus; and a plurality of protocol conversion controllers (20, 22, 24), each one being responsive to the enabling signals and operable for receiving or transmitting a data stream and for converting said data stream into a predetermined protocol format.
Claim 3
Dependent Claim
67 words
The multi-protocol communications adapter device of claim 1 further including a logic circuit control means (26) coupled to the outputs of the protocol conversion controllers (20, 22, 24); said logic circuit control means being operable when activated for permitting data from one of said protocol conversion controllers to pass through and for generating at least one interrupt control signal and a direct memory access (DMA) control signal.
Claim 4
Dependent Claim
80 words
The multi-protocol communications adapter device of claim 1 or 2 wherein the configuration control logic circuit means (18) further includes a configuration register decoder means (1) having its inputs coupled to an address bus (14) of the processor and its output coupled to the configuration register (2); a decoder means (3) coupled to the configuration register and operable for generating a plurality of outputs; and a plurality of "OR" (4-9, 11, 13, 15) circuits coupled to the plurality of outputs.
Claim 5
Dependent Claim
66 words
The multi-protocol communications adapter device of claim 1, 2 or 3 wherein the address decoding means (17) includes a plurality of individual address decoders (36-42), each one being operable for decoding a pre-assigned address range; and a plurality of logical "AND" circuits (70-74) each one being connected to one of the individual address decoders and operable when activated for passing signals from one of the decoders.
Claim 6
Dependent Claim
34 words
The multi-protocol communications adapter device according to any one of the preceding claims wherein the plurality of protocol conversion controllers include an SDLC controller (20), a bisynchronous controller (22) and an asynchronous controller (24).
Claim 7
Independent Claim
32 words
The device according to any one of the preceding claims further including an EIA circuit arrangement being coupled to the control means; and a modem being coupled to the EIA circuit arrangement.
Claim 8
Dependent Claim
33 words
The circuit arrangement of claim 6 wherein the control means further includes means for generating control signals representative of the interrupt levels on which said circuit arrangement will communicate with the computing system.
References Cited (Backward Citations)
No citation records indexed.
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