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EP0223130A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Electronic postage meter circuitry

Assignee: Alcatel Satman SA
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Filing: 1986-10-30
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Granted: —
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Expires: 2006-10-30
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Abstract

Abstract An improved electronic postage meter which includes a microcomputer (17), redundant memories ("BAMs") (35a-b), and fault flip-flops (30a-b). Im­proved circuitry for controlling the writing to the BAMs includes a timer ("BAM-protection timer") (40) coupled to the write-enable input of each of the BAMs. The BAM-protection timer has a trigger input (43) cou­pled to the microcomputer. The microcomputer is pro­grammed to execute an instruction to generate a trigger­ing signal at the BAM-protection timer's trigger input immediately prior to executing an instruction to write to the BAM. This opens a window for writing; the dura­tion of the window is set to be just long enough to allow the completion of the write operation. The fault flip-flops, once set, unconditionally prevent writing to the BAMs, regardless of any other signals that might be present. The setting of the fault flip-flops is controlled by a first timer ("watchdog timer") (60) and a second timer ("second-chance timer") (62). In normal operation, the microcomputer periodically generates a trigger signal for the watchdog and second-chance timers. The watchdog interval exceeds the maximum interval be­tween triggers under normal conditions. If a trigger is not received, the watchdog timer resets the microcom­puter. The second-chance interval is longer than the watchdog interval, so that the second-chance timer times out and sets the fault flip-flops only if the restart still fails to produce a trigger signal within the spec­ified time.

Inventors

  • 👤 John Gregory Haines
  • 👤 Albert Louis Pion
  • 👤 Elizabeth Ann Simon
  • 👤 Christopher Martin Mayer

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 01:48
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/0703; G06F11/0751; G06F11/0754; G06F11/0757; G06F12/00; G06F12/14; G06F12/1416; G06F12/1425; G06F12/1433; G07; G07B; G07B17/00; G07B17/00185; G07B17/00362; G06F11/004; G06F11/16; G07B2017/00395; G07B2017/00411

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 177 words
1/ Electronic postage meter having a programmed microcomputer (17), a fonctionally non-volatile memory (15) operatively coupled thereto for storing accounting data, and a control circuit (20) operatively coupled to the microcomputer and to the memory for controlling writing into the memory characterised in that said control circuitry comprises timer means (40) having a trigger input (43) and an output (44), said input being operatively coupled to the microcomputer (17), said output being coupled to the memory (15) for preventing writing into the memory except during a predetermined interval following the receipt of a triggering signal at said trigger input ; in that the microcomputer (17) is programmed to initiate the issuance of said triggering signal to said timer means (40) only immediately prior to the microcomputer's executing an instruction to write into the memory (15), and in that said predetermined interval is sufficiently long to permit execution of such instruction to write into the memory (15), but not significantly longer, whereupon writing to said memory is possible substantially only when occurring under control of said microcomputer (17).
Claim 2
Dependent Claim 177 words
1/ Electronic postage meter having a programmed microcomputer (17), a fonctionally non-volatile memory (15) operatively coupled thereto for storing accounting data, and a control circuit (20) operatively coupled to the microcomputer and to the memory for controlling writing into the memory characterised in that said control circuitry comprises timer means (40) having a trigger input (43) and an output (44), said input being operatively coupled to the microcomputer (17), said output being coupled to the memory (15) for preventing writing into the memory except during a predetermined interval following the receipt of a triggering signal at said trigger input ; in that the microcomputer (17) is programmed to initiate the issuance of said triggering signal to said timer means (40) only immediately prior to the microcomputer's executing an instruction to write into the memory (15), and in that said predetermined interval is sufficiently long to permit execution of such instruction to write into the memory (15), but not significantly longer, whereupon writing to said memory is possible substantially only when occurring under control of said microcomputer (17).
Claim 3
Dependent Claim 18 words
2/ Electronic postage meter of claim 1 characterised in that said timer means (40) comprises a one-shot multivibrator.
Claim 4
Dependent Claim 42 words
3/ Electronic postage meter of claim 1, characterised in that it further comprises means (85), coupled to an enable input of the memory, for disabling said memory for a predetermined interval following the appli­cation of a signal enabling the microcomputer to power-on.
Claim 5
Dependent Claim 64 words
4/ Electronic postage meter of claim 3 characterised in that said means (85) for disabling comprises : - resistor/capacitor means (85) responsive to the signal enabling the microcomputer, for providing a delayed signal representative thereof ; and - gating means, responsive to a memory-enabling signal from the microcomputer and to the delayed signal, for enabling the memory when both the aforesaid signals are asserted.
Claim 6
Dependent Claim 397 words
5/ Electronic postage meter according to any one of claims 1 to 4, wherein said programmed microcomputer (17), the memory (15) for storing accounting information, a printing mechanism (12) and the control circuitry (20) are in a secure housing (10), wherein printing of value indicia and updating of the contents of the memory occur under control of the microcomputer to maintain proper accounting of value indicia printed, and wherein said control circuitry (20) comprises further non-user-resettable means (30a-b) having a fault input (32a-b)) and being operatively coupled to the printing mechanism and to the memory, for deactivating the meter in response to the appearance of a fault signal at said fault input, and second timer means (60, 62) coupled to the microcomputer and having an output coupled to the fault input, for temporily keeping from setting said non-user-resettable means to the faulted state, said non-user-ressettable means having first associated means (42a-b) coupled to the memory, for preventing the microcomputer from writing data into the memory, and second associated means (52) coupled to the printing mechanism, for preventing activation of the printing mechanism, and, once set in response to such a fault signal at said fault input, being beyond control of the microcomputer ; and the microcomputer being programmed for issuing a refresh signal within a first predetermined time interval T1 after commencing operation from an initial state and at subsequent intervals no greater than a second predetermined time interval T2 from the previous refresh signal, characterised in that said second timer means comprises : - a first timer (60) coupled to the microcomputer for receiving said refresh signal and for providing a reset signal to the microcomputer, in the event the microcomputer does not issue a refresh signal within a third time interval T3 after the previous refresh signal, said reset signal causing said microcomputer to commence operation from said initial state in response to a reset signal at said reset input ; and - a second timer (62) coupled to said microcomputer and to said non-user-resettable means (30a-b), for receiving said refresh signal and providing a fault signal to said fault input, in the event that the microcomputer does not issue a refresh signal within a fourth predetermined time interval T4 after the previous refresh signal ; wherein T3 exceeds the maximum of T1 and T2, and wherein T4 exceeds the sum of T1 and T3.
Claim 7
Dependent Claim 53 words
6/ Electronic postage meter of claim 5, characterised in that it further comprises means (85) for disabling said non-user,resettable means (30a-b) for a predetermined interval T5 following the enabling of the microcomputer on power up, during which interval the microcomputer is allowed to commence operation from said initial state, wherein T5 exceeds T1.

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