Patent EP0220894A2 successfully refreshed from Google Patents.
EP0220894A2
Expired / Lapsed
EP
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A clamping circuit for an analogue to digital converter
Assignee: Rank Cintel Ltd
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Filing: 1986-10-17
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Granted: —
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Expires: 2006-10-17
Abstract
Abstract The clamping circuit clamps a threshold of an ADC to a signal level just below the black level of a television signal. During the blanking period, a negative-going peak is superimposed on the input signal to produce the waveform 76. Each time this crosses the 0000,0001 threshold of the ADC, the polarity of the output of a comparator changes (see the middle waveform). The comparator compares the ADC output and a reference value. The input signal is biased according to the integral of the comparator output. When signal levels are stable, the comparator output is symmetrical, its integral is zero and no change occurs in the biassing. If signal levels drift, the negative going peak crosses the threshold for the second time relatively sooner or later. The comparator output becomes assymmetric and has a non-zero integral. Consequently, the biassing level changes to compensate for the drift.
Inventors
- 👤 John David Millward
- 👤 Kevin David Brown
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 14:28
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/14; H04N5/16; H04N5/18; H04N5/185; H03; H03M; H03M1/00; H03M1/12; H03M1/124; H03M1/129; H03M1/1295; H03M1/14; H03M1/16; H03M1/164
Claims Analysis
Total Claims: 37
Claim 1
Independent Claim
101 words
A clamping circuit for an analogue to digital converter, characterised in that it comprises combining means (60,155;60a,158a) for combining an input signal and a reference signal to provide an input for the converter (56,156;56a,156a), and a negative feedback circuit for biassing the input for the converter, the feedback circuit comprising a comparator for comparing the converter output and a digital reference value to provide an output whose polarity depends on the result of the comparison, an integrator (66;66a) for integrating the comparator output, and means for biassing the input for the converter (56,156;56a,156a) according to the level of the integrator output.
Claim 2
Dependent Claim
101 words
A clamping circuit for an analogue to digital converter, characterised in that it comprises combining means (60,155;60a,158a) for combining an input signal and a reference signal to provide an input for the converter (56,156;56a,156a), and a negative feedback circuit for biassing the input for the converter, the feedback circuit comprising a comparator for comparing the converter output and a digital reference value to provide an output whose polarity depends on the result of the comparison, an integrator (66;66a) for integrating the comparator output, and means for biassing the input for the converter (56,156;56a,156a) according to the level of the integrator output.
Claim 3
Dependent Claim
43 words
A circuit according to claim 1 for clamping a stage of an iterative analogue to digital converter, wherein the circuit provides the input signal as an output for use in a following stage before the input signal is combined with the reference signal.
Claim 4
Dependent Claim
21 words
A circuit according to claim 1 or 2, wherein the biassing means bias the input signal before the signals are combined.
Claim 5
Dependent Claim
20 words
A circuit according to claims 2 and 3, wherein the output for the following stage is the biassed input signal.
Claim 6
Dependent Claim
21 words
A circuit according to claim 1 or 2, wherein the biassing means bias the reference signal before the signals are combined.
Claim 7
Dependent Claim
42 words
A circuit according to any preceding claim, in which the comparator output has positive and negative polarity when the converter output is more than and less than the reference value respectively, and the integrator (66;66a) generates a negative integral of its input.
Claim 8
Dependent Claim
28 words
A clamping circuit according to any preceding claim, further comprising a switch (72;72a) operable to make or break the connection between the comparator (64;64a) and the integrator (66;66a).
Claim 9
Dependent Claim
23 words
A circuit according to claim 7, comprising means for closing the switch (72;72a) only during periods in which the input signal is blanked.
Claim 10
Dependent Claim
27 words
A circuit according to claim 8, further comprising means (62;62a) for supplying a reference signal which is nominally constant except during blanked periods of the input signal.
Claim 11
Dependent Claim
18 words
A circuit according to claim 9, in which the reference signal has a negative-going peak during blanked periods.
Claim 12
Dependent Claim
23 words
A circuit according to claim 10, in which the negative-going peak has a substantially vertical leading edge, and a substantially exponential trailing edge.
Claim 13
Dependent Claim
22 words
A circuit according to any preceding claim, in which the integrator (66;66a) and/or the combining means (60,158;60a,158a) each comprise an operational amplifier.
Claim 14
Independent Claim
89 words
A method of clamping the output of an analogue to digital converter (56,156;56a,156a) characterized in that a reference signal is combined with the input signal and negative feedback is applied from the converter (56,156;56a,156a) output to bias the input signal, the output of the converter being compared with a digital reference value to generate a result signal whose polarity depends on the result of the comparison, the result signal being integrated to form an integral signal, and the biassing being set according to the value of the integral signal.
Claim 15
Independent Claim
89 words
A method of clamping the output of an analogue to digital converter (56,156;56a,156a) characterized in that a reference signal is combined with the input signal and negative feedback is applied from the converter (56,156;56a,156a) output to bias the input signal, the output of the converter being compared with a digital reference value to generate a result signal whose polarity depends on the result of the comparison, the result signal being integrated to form an integral signal, and the biassing being set according to the value of the integral signal.
Claim 16
Dependent Claim
44 words
A method of clamping a stage of an iterative analogue to digital converter according to the method of claim 13, including providing the input signal as an output for use in a following stage before the input signal is combined with the reference signal.
Claim 17
Dependent Claim
18 words
A method according to claim 13 or 14, including biassing the input signal before the signals are combined.
Claim 18
Independent Claim
20 words
A method according to claims 14 and 15, wherein the output for the following stage is the biassed input signal.
Claim 19
Dependent Claim
18 words
A method according to claim 13 or 14, including biassing the reference signal before the signals are combined.
Claim 20
Independent Claim
43 words
A method according to any of claims 13 to 17, in which the result signal has positive and negative polarity when the converter output is more and less, respectively, than the reference value, and a negative integral of the result signal is formed.
Claim 21
Independent Claim
45 words
A method according to any of claims 13 to 18, wherein integration only takes place during blanked periods of the input signal and wherein the biassing level is held at the level obtaining at the end of a blanking period during the succeeding unblanked period.
Claim 22
Dependent Claim
23 words
A method according to claim 19, including generating the reference signal to be nominally constant except during blanked periods of the input signal.
Claim 23
Dependent Claim
18 words
A method according to claim 20, in which the reference signal has a negative-going peak during blanked periods.
Claim 24
Dependent Claim
23 words
A method according to claim 17, in which the negative-going peak has a substantially vertical leading edge and a substantially exponential trailing edge.
Claim 25
Dependent Claim
94 words
A signal processing circuit for analogue signals having periodic blanking periods during which the signal has a nominally constant voltage, characterized in that the circuit comprises an analogue to digital converter (56,156;56a,156a) including clamping means (54,154;54a,154a) operable to maintain a threshold of the converter (56,156;56a,156a) at a voltage level relatively slightly displaced in one sense from the nominally constant voltage and to maintain the adjacent corresponding threshold of the converter to be relatively greatly displaced in the opposite sense from the nominally constant voltage, irrespective of changes in the d.c. level of the signal.
Claim 26
Dependent Claim
94 words
A signal processing circuit for analogue signals having periodic blanking periods during which the signal has a nominally constant voltage, characterized in that the circuit comprises an analogue to digital converter (56,156;56a,156a) including clamping means (54,154;54a,154a) operable to maintain a threshold of the converter (56,156;56a,156a) at a voltage level relatively slightly displaced in one sense from the nominally constant voltage and to maintain the adjacent corresponding threshold of the converter to be relatively greatly displaced in the opposite sense from the nominally constant voltage, irrespective of changes in the d.c. level of the signal.
Claim 27
Dependent Claim
24 words
A circuit according to claim 23, for analogue television signals, and further comprising a gamma correction circuit for correcting the output of the converter.
Claim 28
Dependent Claim
30 words
A circuit according to claim 23 or 24, wherein the maintained threshold is a threshold corresponding to a change in the most significant bit or byte provided by the converter.
Claim 29
Dependent Claim
17 words
A circuit according to claim 23, 24 or 25, wherein the converter (56,156;56a,156a) is an iterative converter.
Claim 30
Dependent Claim
27 words
A circuit according to any of claims 23 to 26, wherein the clamping means (54,154;54a,154a) comprise a clamping circuit according to any of claims 1 to 12.
Claim 31
Independent Claim
91 words
A method of processing analogue signals having periodic blanking periods during which the signal has a nominally constant voltage, characterized in that the signals are converted by means of an analogue to digital converter (56,156;56a,156a), and the converter is clamped to maintain a threshold of the converter at a voltage level relatively slightly displaced in one sense from the nominally constant voltage and to maintain the adjacent corresponding threshold relatively greatly displaced in the opposite sense from the nominally constant voltage, irrespective of changes in the d.c. level of the signal.
Claim 32
Independent Claim
91 words
A method of processing analogue signals having periodic blanking periods during which the signal has a nominally constant voltage, characterized in that the signals are converted by means of an analogue to digital converter (56,156;56a,156a), and the converter is clamped to maintain a threshold of the converter at a voltage level relatively slightly displaced in one sense from the nominally constant voltage and to maintain the adjacent corresponding threshold relatively greatly displaced in the opposite sense from the nominally constant voltage, irrespective of changes in the d.c. level of the signal.
Claim 33
Dependent Claim
22 words
A method according to claim 28, applied to television signals, in which gamma correction is applied to the output of the converter.
Claim 34
Dependent Claim
30 words
A method according to claim 28 or 29, wherein the maintained threshold iÞ a threshold corresponding to a change in the most significant bit or byte provided by the converter.
Claim 35
Independent Claim
18 words
A method according to claims 28, 29 or 30, in which the converter (56,156;56a,156a) is an iterative converter.
Claim 36
Independent Claim
26 words
A method according to any of claims 28 to 31, in which the converter is clamped by the method of any of claims 13 to 22.
Claim 37
Dependent Claim
55 words
A telecine projector comprising an analogue to digital converter (56,156;56a,156a) for converting video signals generated by scanning a film image, and a clamping circuit (54,154;54a,154a) according to any of claims 1 to 12, arranged to clamp a transition in the converter output to a signal level just below the black level of the video signal.
References Cited (Backward Citations)
No citation records indexed.
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