Patent EP0219241A2 successfully refreshed from Google Patents.
← Back to Patent Explorer
EP0219241A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Non-volatile semiconductor memory

Assignee: Seiko Instruments Inc
•
Filing: 1986-09-23
•
Granted: —
•
Expires: 2006-09-23
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A non-volatile semiconductor memory comprises source and drain regions (2,3) provided on a semiconductor substrate (1) of one conductivity type opposite to that of the source and drain regions, a gate insulator film (4) provided on the surface of a portion of the substrate which is located between the source and drain regions, a floating gate electrode (6) provided on part of the gate insulator film, and a tunnel insulator film abuts against the other part of the floating gate electrode and constitutes a CVD insulator film (5). An electrode, for example the drain region 3, transfers electric charge between the same and the floating gate electrode, provided opposite to the floating gate electrode through the tunnel insulator film. A control gate (8) is provided above the floating gate electrode through an insulator film.

Inventors

  • 👤 Masaaki C/O Seiko Instr. & Electronics Ltd Kamiya
  • 👤 Yukihiro C/O Seiko Instr. & Electronics Ltd Imura
  • 👤 Katsuyuki Seiko Instr. Takahashi

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-24 13:23
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/683

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 143 words
A non-volatile semiconductor memory comprising: source and drain regions (2,3; 22,23) respectively provided on a semiconductor substrate (1; 21) of one conductivity type opposite to that of the source and drain regions; a gate insulator film (4; 24) provided on the surface of a portion of said substrate which is located between said source and drain regions; a floating gate electrode (6; 26) provided on part of said gate insulator film; and a tunnel insulator film abuted against the other part of said floating gate electrode and constituting a CVD insulator film (5; 25), characterised by an electrode (3; 29) for transferring electric charge between the same and said floating gate electrode (6; 26), provided opposite to said floating gate electrode through said tunnel insulator film, and a control gate electrode (8; 28) provided above said floating gate electrode through an insulator film.
Claim 2
Dependent Claim 143 words
A non-volatile semiconductor memory comprising: source and drain regions (2,3; 22,23) respectively provided on a semiconductor substrate (1; 21) of one conductivity type opposite to that of the source and drain regions; a gate insulator film (4; 24) provided on the surface of a portion of said substrate which is located between said source and drain regions; a floating gate electrode (6; 26) provided on part of said gate insulator film; and a tunnel insulator film abuted against the other part of said floating gate electrode and constituting a CVD insulator film (5; 25), characterised by an electrode (3; 29) for transferring electric charge between the same and said floating gate electrode (6; 26), provided opposite to said floating gate electrode through said tunnel insulator film, and a control gate electrode (8; 28) provided above said floating gate electrode through an insulator film.
Claim 3
Dependent Claim 31 words
A non-volatile semiconductor memory as claimed in claim 1 characterised in that said CVD insulator film is constituted by a CVD silicon oxide film formed at a temperature less than 700°C.
Claim 4
Dependent Claim 36 words
A non-volatile semiconductor memory as claimed in claim 1 or 2 characterised in that said drain region (3) also serves as said electrode which transfers electric charge between the same and said floating gate electrode (6).

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag