Patent EP0218408A2 successfully refreshed from Google Patents.
EP0218408A2
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EP
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Process for forming lightly-doped-grain (LDD) structure in integrated circuits
Assignee: HP Inc
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Filing: 1986-09-22
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Granted: —
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Expires: 2006-09-22
Abstract
Abstract A new lightly doped drain (LDD) process which does not require extra masking steps as compared to the conventional CMOS process employs a two layer side wall spacer technology, in which the LDD ion implantation for n-channel and p-channel devices can be carried out by sharing the n + or p source and drain ion implantation mask. This provides maximum flexibility in designing optimum n- and p-channel LDD MOSFETs without using any additional mask steps other than the conventional CMOS mask levels, and is also compatible with self-aligned silicide process.
Inventors
- 👤 Kuang Yi Chiu
- 👤 Fu Chieh Hsu
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 17:08
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/60; H10D64/00; H10D64/01; H10D64/021; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0184; H10D84/02; H10D84/03; H10D84/038; H10P; H10P76/00; H10P76/40; H10P76/408; H10P76/4085
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
93 words
A method for producing a lightly doped area in a substrate comprising the steps of: (a) forming a gate on a substrate; (b) covering the gate and the substrate with a first layer; (c) covering the first layer with a second layer; (d) removing the second layer but retaining side walls on the gate; (e) doping a first area of the substrate not shielded by the second layer; (f) removing the side walls; and (g) doping a second area of the substrate underneath the removed side walls to produce the lightly doped area.
Claim 2
Independent Claim
93 words
A method for producing a lightly doped area in a substrate comprising the steps of: (a) forming a gate on a substrate; (b) covering the gate and the substrate with a first layer; (c) covering the first layer with a second layer; (d) removing the second layer but retaining side walls on the gate; (e) doping a first area of the substrate not shielded by the second layer; (f) removing the side walls; and (g) doping a second area of the substrate underneath the removed side walls to produce the lightly doped area.
Claim 3
Dependent Claim
30 words
A method for manufacturing junctions as in claim 1, further comprising the step of forming a protective layer directly on the substrate and gates before the first layer is formed.
Claim 4
Dependent Claim
27 words
A method for manufacturing junctions as in claim 1, wherein the step for covering the gates and the substrate include using silicon nitride to comprise the layer.
Claim 5
Dependent Claim
30 words
A method for manufacturing junctions as in claim 1, wherein the step for covering the first layer with a second layer includes using silicon dioxide to comprise the second layer.
Claim 6
Dependent Claim
25 words
A method for manufacturing junctions as in claim 1, wherein the step for removing the second layer includes using the first layer as an etch-stop.
Claim 7
Dependent Claim
23 words
A method for manufacturing junctions as in claim 1, wherein the step for removing the second layer includes using an anisotropic etching process.
Claim 8
Dependent Claim
22 words
A method for manufacturing junctions as in claim 1, wherein the step for selectively covering includes using photoresist and developing the photoresist.
Claim 9
Dependent Claim
23 words
A method for manufacturing junctions as in claim 1, wherein the step for removing the side walls includes a standard wet etching process.
Claim 10
Dependent Claim
35 words
A method for manufacturing junctions as in claim 1, wherein the step for forming a second doped area further comprises forming a doped area having a smaller concentration of ions than the first doped area.
Claim 11
Dependent Claim
33 words
A method for manufacturing junctions as in claim 1, further comprising the step of adjusting the depth of the first layer to vary the overlap of the gate with the source and drain.
Claim 12
Dependent Claim
23 words
A method for manufacturing junctions as in claim 1, further comprising the step of selectively covering regions of the substrate with a mask.
Claim 13
Dependent Claim
17 words
An integrated circuit device having a lightly doped drain manufactured by the method of any preceding claim.
References Cited (Backward Citations)
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