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Field effect transistor

Assignee: Fujitsu Ltd
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Filing: 1986-08-20
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Granted: —
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Expires: 2006-08-20
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Abstract

Abstract A field effect transistor includes a semiconductor substrate (ll), first and second semiconductor layers (l2, 4l) formed on the semiconductor substrate, and third semiconductor layers (2l, 22, 23) located between the first and second semiconductor layers. The third semicon­ductor layers (2l, 22, 23) have a forbidden band with narrower than those in the first and second semiconductor layers and form a quantum well. The third semiconductor layers include a doping layer (22) such as planar-doping or high doping, and a channel is formed in the third semi­conductor layers along the quatrum well. The electrons supplied from the doped layer are confined by the quantum well and form a quasi-two-dimensional electron gas.

Inventors

  • 👤 Kohki Hikosaka
  • 👤 Yasutake Hirachi

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-02 22:58
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/80; H10D62/82; H10D62/824; H10D30/00; H10D30/40; H10D30/47; H10D30/471; H10D30/473; H10D30/4732; H10D30/4735; H10D62/60; H10D62/605; H10D64/00; H10D64/60; H10D64/602

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 70 words
A field effect transistor comprising: a semiconductor substrate; first and second semiconductor layers formed on said semiconductor substrate; and third semiconductor layers located between said first and second semiconductor layers, having a forbidden band width narrower than those in said first and second semiconductor layers, and forming quantum wells; said third semiconductor layers including a doping layer; a channel being formed in said third semiconductor layers along said quantum well.
Claim 2
Dependent Claim 70 words
A field effect transistor comprising: a semiconductor substrate; first and second semiconductor layers formed on said semiconductor substrate; and third semiconductor layers located between said first and second semiconductor layers, having a forbidden band width narrower than those in said first and second semiconductor layers, and forming quantum wells; said third semiconductor layers including a doping layer; a channel being formed in said third semiconductor layers along said quantum well.
Claim 3
Dependent Claim 19 words
A field effect transistor according to claim l, wherein said quantum well is provided as a single quantum well.
Claim 4
Dependent Claim 69 words
A field effect transistor according to claim 2, wherein said semiconductor substrate is made of semi­insulator gallium-arsenide GaAs, said first and second semiconductor layers are made of aluminum - gallium - ­arsenide AlGaAs, said third semiconductor layer is made of gallium-arsenide GaAs, said doping layer is a planar doping layer or a high doping layer, and a non-doping gallium-arsenide layer is located in both side of said doping layer.
Claim 5
Dependent Claim 78 words
A field effect transistor according to claim l, wherein said quantum well is formed as a quantum well having at least one barrier allowing a tunnel effect therethrough, a doping layer is provided in one of divisional regions having a relatively narrow width among said divisional regions of said quantum well divided by at least one barrier, and divisional regions having a relatively wide width among said divisional regions of said quantum well are formed as non-doping regions

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