Patent EP0213694A2 successfully refreshed from Google Patents.
EP0213694A2
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EP
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Digital computer with cache capable of concurrently handling multiple accesses from parallel processors
Assignee: Alliant Computer Systems Corp
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Filing: 1986-06-17
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Granted: —
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Expires: 2006-06-17
Abstract
Abstract A digital computer has a main memory, a cache connected to the main memory and a plurality of processors connected to the cache. Means permit each of the processors to access the same memory locations of the cache. The cache has means for concurrently accepting a current access from one of the processors while taking steps to complete a pending access made earlier by one of the processors.
Inventors
- 👤 Jonathan Seth Blau
- 👤 Robert L. Fredieu
- 👤 Michael L. Ziegler
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 03:27
CPC Classifications
G; G06; G06F; G06F8/00; G06F8/40; G06F8/41; G06F8/45; G06F12/00; G06F12/02; G06F12/08; G06F12/0802; G06F12/0844; G06F12/0846; G06F12/0851; G06F12/10; G06F12/1027; G06F12/109; G06F9/00; G06F9/06; G06F9/44; G06F9/448; G06F9/4482; G06F9/4484; G06F9/4486
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
67 words
A digital computer comprising a main memory, a cache connected to said main memory, a plurality of processors connected to said cache, means for permitting each of said processors to access the same memory locations of said cache, and means in said cache for concurrently accepting a current access from a said processor while taking steps to complete a pending access made earlier by a said processor.
Claim 2
Dependent Claim
67 words
A digital computer comprising a main memory, a cache connected to said main memory, a plurality of processors connected to said cache, means for permitting each of said processors to access the same memory locations of said cache, and means in said cache for concurrently accepting a current access from a said processor while taking steps to complete a pending access made earlier by a said processor.
Claim 3
Dependent Claim
37 words
The digital computer of claim 1 wherein said cache includes means for retrieving data from said memory in blocks, each block having a block address, and means for storing block addresses for said current and pending accesses.
Claim 4
Dependent Claim
35 words
The digital computer of claim 2 wherein said cache further includes means for storing a status code for said pending access, said status code comprising a prescription of the steps necessary to complete the access.
Claim 5
Dependent Claim
38 words
The digital computer of claim 3 wherein said cache further includes means for concurrently taking steps to complete a plurality of pending accesses, and means for storing the block address and status code for each said pending access.
Claim 6
Dependent Claim
60 words
The digital computer of claim 4 wherein said cache further includes means for comparing the stored block address for each pending access to the address of each new block received by said cache from memory, and means for redetermining the status code for each pending access based on the prior state of said status and the outcome of said comparison.
Claim 7
Dependent Claim
41 words
The digital computer of claim 5 wherein said means for redetermining the status code bases said redetermination on information on what steps have been and/or are being taken to complete the pending access corresponding to the new block received from memory.
Claim 8
Dependent Claim
27 words
The digital computer of claim 6 wherein said means for redetermining said status code bases said redetermination on what other activities are currently occurring in said cache.
Claim 9
Dependent Claim
55 words
The digital computer of claim 5 wherein said cache further includes means for comparing the block address of said current access to the block addresses of main memory accesses still in progress (not yet available in the cache memory) and means for determining an initial status code for said current access based on said comparison.
Claim 10
Dependent Claim
115 words
The digital computer of claim 8 wherein said block address consists of a tag and an index, said cache comprises a tag store in which said tags are stored at addresses specified by said index and a data store in which said data is stored at an address specified by said index, and means are provided for comparing the index of said current access to the index portions of the block addresses for memory accesses still in progress (whereby it be determined whether a block of data accessed from memory, though not the data sought by said current access, is data that will be written into the data store location addressed by said current access).
Claim 11
Dependent Claim
36 words
The digital computer of claim 1, 3, 4, 5, or 8 wherein said cache is divided into a plurality of sections and includes means for concurrently accepting a plurality of accesses to different said cache sections.
Claim 12
Dependent Claim
94 words
The digital computer of claim 4 wherein said cache further includes quick-work logic means for controlling current accesses that are capable of immediate completion and thereby do not become pending accesses, pending-status logic means for initially determining the status code for a pending access, for storing status codes of said pending accesses, and for redetermining said status codes based on changed conditions, pending access completion means for taking control of the data and address paths within said cache to complete a said pending access when said status code indicates that it can be completed.
Claim 13
Dependent Claim
80 words
The digital computer of claim 11 wherein said pending access completion means includes unpended-work logic means for completing pending accesses that do not require their own independent main memory access, and memory logic means for completing pending accesses that do require their own independent main memory accesses, and means for giving priority for use of data and address paths within said cache for completing accesses to said memory logic means, quick-work logic means, and unpended-work logic means in that order.
Claim 14
Dependent Claim
66 words
The digital computer of claim 4 wherein said cache includes means for delaying completion of a first said pending access in preference for a second pending access when said first and second pending accesses are from the same said processor and said second pending access was received by said cache before said first pending access, whereby the order of processor accesses to said cache is preserved.
Claim 15
Dependent Claim
58 words
The digital computer of claim 5 or 8 wherein said cache is divided into a plurality of sections and includes means for concurrently accepting a plurality of accesses to different said cache sections and said cache sections include means for accessing blocks of data from said main memory and means for dividing each said block between cache sections.
Claim 16
Dependent Claim
89 words
The digital computer of claim 14 wherein two or more of said cache sections each include means for driving a common memory address bus with the block address of the block of data to be accessed in memory, said two or more cache sections each include means for concurrently reading said block address from said common memory address bus, and said means for comparing addresses thereby compares the addresses for accesses in one said cache section to the addresses of blocks accessed from main memory by another said section.
References Cited (Backward Citations)
No citation records indexed.
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