Voltage/frequency converter

Claim 2

A voltage/frequency converter comprising: voltage/frequency converter means (12) for generating a voltage/frequency conversion output (eo, el2) having a frequency (fc) corresponding to a voltage/ frequency conversion input (e10, elOS); compensator means (14 to 26) for providing a compensation signal (ej) corresponding to the difference (fo - fc) between a predetermined reference frequency (fo) and the frequency (fc) of said voltage/frequency conversion output (eo, e12): and combination means (10, 10S) for combining said compensation signal (ej) with a converter input signal (ei) to generate said voltage/frequency conversion input (elO), characterized in that said voltage/frequency converter means (12) responds to the component of said compensation signal (ej) contained in said voltage/ frequency conversion input (elO), so that the frequency (fc) of said voltage/frequency conversion output (eo, e12), obtained when said converter input signal (ei) has a prescribed magnitude, follows said predetermined reference frequency (fo).

Claim 3

A voltage/frequency converter according to claim 1, characterized in that said compensator means (14 to 26) includes: a counter circuit (16 to 24) for providing an N-bit count (d24) which represents the difference (fo - fc) between the number of oscillations (fc) of said voltage/ frequency conversion output (e12), obtained within a first given period of time (t0 to tl in Fig. 2C), and the number of oscillations (fo) of a reference signal (e14), obtained within a second given period of time (tl to t2 in Fig. 2D) and having said predetermined frequency (fo); and a digital/analog converter (26) for providing said compensation signal (ej) whose DC level corresponds to a count value of the upper M bits of said N-bit count (d24), where the integer M is equal to or less than the integer N.

Claim 4

A voltage/frequency converter according to claim 2, characterized in that said counter circuit (16 to 24) includes:

Claim 5

a first gate circuit (22) for providing a first clock signal (e22) by passing said voltage/frequency conversion output (el2) for said first given period of time (t0 to tl); a second gate circuit (20) for providing a second clock signal (e20) by passing said reference signal (el4) for said second given period of time (tl to t2); and an up/down counter (24), which performs an up-count operation when said second clock signal (e20) is provided but said first clock signal (e22) is not, and which performs a down-count operation when said first clock signal (e22) is provided but said second clock signal (e20) is not, for providing said N-bit count (d24) as a result of the up- and down-count operations.

Claim 6

a first gate circuit (22) for providing a first clock signal (e22) by passing said voltage/frequency conversion output (el2) for said first given period of time (t0 to tl); a second gate circuit (20) for providing a second clock signal (e20) by passing said reference signal (el4) for said second given period of time (tl to t2); and an up/down counter (24), which performs an up-count operation when said second clock signal (e20) is provided but said first clock signal (e22) is not, and which performs a down-count operation when said first clock signal (e22) is provided but said second clock signal (e20) is not, for providing said N-bit count (d24) as a result of the up- and down-count operations.

Claim 7

A voltage/frequency converter according to claim 3, characterized in that said combination means (10) includes: means (Fig. 5A) for adding said compensation signal (ej) to said converter input signal (ei).

Claim 8

A voltage/frequency converter according to claim 2, characterized in that said counter circuit (16 to 24) includes: a first gate circuit (22) for providing a first clock signal (e22) by passing said voltage/frequency conversion output (el2) for said first given period of time (t0 to tl); a second gate circuit (20) for providing a second clock signal (e20) by passing said reference signal (el4) for said second given period of time (tl to t2); and an up/down counter (24), which performs a down-count operation when said second clock signal (e20) is provided but said first clock signal (e22) is not, and which performs an up-count operation when said first clock signal (e22) is provided but said second clock signal (e20) is not, for providing said N-bit count (d24) as a result of the up- and down-count operations.

Claim 9

A voltage/frequency converter according to claim 5, characterized in that said combination means (10S) includes: means (Fig. 5B or 100 + 10 in Fig. lA) for subtracting said compensation signal (ej) from said converter input signal (ei).

Claim 10

A voltage/frequency converter according to claim 2, characterized in that said compensator means (14 to 26) further includes: a latch circuit (25) for latching the count value of the upper M bits of said N-bit count (d24) by a latch pulse (e16), and providing the latched M-bit data (d25) to said digital/analog converter (26), said latch pulse (e16) being generated in accordance with the lapse of said first and second given periods of time (tO - tl - t2).

Claim 11

A voltage/frequency converter according to claim 1, characterized in that said combination means (10) includes: an analog circuit (A10, R100 to R105, Sl to S4), having an operational bias point which is varied with the content (d24) of said compensation signal (ej), for amplifying said converter input signal (ei) to provide said voltage/frequency conversion input (elO), the DC level of said voltage/frequency conversion input (el0) depending on said operational bias point.

Claim 12

A voltage/frequency converter according to claim 1, characterized in that said compensator means (14 to 26) includes: an up/down counter (24) for up-counting said voltage/frequency conversion output (e12), down-counting a reference signal (e14) having said reference frequency (fo), and providing a count output (d24) corresponding to said compensation signal (ej).

Claim 13

A voltage/frequency converter according to claim 1, characterized in that said compensator means (14 to 26) includes: an up/down counter (24) for down-counting said voltage/frequency conversion output (e12), up-counting a reference signal (el4) having said reference frequency (fo), and providing a count output (d24) corresponding to said compensation signal (ej).

Claim 14

A voltage/frequency converter according to claim 9, characterized in that said combination means (10S) includes: means (Fig. 5B or 10S in Fig. 6) for subtracting said compensation signal (ej) from said converter input signal (ei).

Claim 15

A voltage/frequency converter according to claim 10, characterized in that said combination means

Claim 16

(10) includes: means (Fig. 5A or 10B in Fig. 6A) for adding said compensation signal (ej) to said converter input signal (ei).

Claim 17

(10) includes: means (Fig. 5A or 10B in Fig. 6A) for adding said compensation signal (ej) to said converter input signal (ei).

Claim 18

A voltage/frequency converter according to claim 1, characterized in that said compensator means (14 to 26) includes: a presettable down-counter (24), to which predetermined data (KO = fo - fj) is preset for each predetermined period of time, for down-counting said voltage/frequency conversion output (e12) after completing the preset of said predetermined data (KO), and providing a count output (d24) representing the difference (fo - fj - fc) between a frequency (fo - fj) corresponding to said predetermined data (KO) and the frequency (fc) of said voltage/frequency conversion output (eo).

Claim 19

A voltage/frequency converter according to claim 13, characterized in that said compensator means (14 to 26) further includes: means (25 to 27) for modifying the count output (d24) from said presettable down-counter (24) by predetermined compensation data (Kl = fj), so that said count output (d24) is converted into said compensation signal (ej = fo - fc).

Claim 20

A voltage/frequency converter according to claim 13, characterized in that said compensator means (14 to 26) further includes: means (14, 140) for supplying a preset pulse (e141) to said presettable down-counter (24) for every first cyclic period of time, and generating a latch pulse (e142) for every second cyclic period of time which is synchronized to said first cyclic period of time; means (25, 26) for latching the content of said count output (d24) according to said latch pulse (el42), and providing, as a result of the latching, a preliminary compensation signal (e26 = fo - fj - fc) corresponding to said count output (d24); and means (27) for modifying said preliminary compensation signal (e26) by predetermined compensation data (Kl = fj) to provide said compensation signal (ej = fo - fc).

Claim 21

A voltage/frequency converter according to claim 1, characterized in that said compensator means (14 to 26) includes: computer means (240, 26), having a function (ST10 to ST16 in Fig. 13A) of detecting a frequency difference (Ifo - fcl) between the frequency (fc) of said voltage/ frequency conversion output (e12) and said reference frequency (fo), for providing said compensation signal (ej) having a magnitude corresponding to said frequency difference (Ifo - fcl) when the magnitude of said compensation signal (ej) exceeds a predetermined value (fx), and, when the magnitude of said compensation signal (ej) falls under said predetermined value (fx), setting the magnitude of said compensation signal (ej) at a fixed value depending on the magnitude of saia compensation signal (ej).

Claim 22

A voltage/frequency converter according to claim 1, characterized in that said compensator means (14 to 26) includes: computer means (240, 26), having a function (ST30 to ST38 in Fig. 13B) of providing a count which is incremented by either one of said voltage/frequency conversion output (e12) and a reference signal (el4) having said reference frequency (fo) and which is decremented by the other, for providing said compensation signal (ej) representing a result (d240) of count of said incrementing and decrementing when said result ( d 240) of count exceeds a predetermined value (Nx), and, when said result (d240) of count is smaller than said predetermined value (Nx), setting the magnitude of said compensation signal (ej) at a fixed value which corresponds to said result (d240) of count.

Claim 23

A voltage/frequency converter comprising: voltage/frequency converter means (12) for generating a voltage/frequency conversion output (eo, el2) having a frequency (fc) corresponding to the potential of a voltage/frequency conversion input (elO, elOS); reference signal source means (14) for generating a reference signal (e14) having a predetermined reference frequency (fo); counter means (24) for providing a digital count output (d24) which corresponds to the difference between the number of oscillations of said voltage/frequency conversion output (e12), obtained within a predetermined period of time, and the number of oscillations of said reference signal (e14), obtained within said predetermined period of time, said digital count output (d24) being incremented by either one of said voltage/ frequency conversion output (el2) and said reference signal (e14) and being decremented by the other; digital/analog converter means (26) for generating an analog compensation signal (ej) having a potential corresponding to said digital count output (d24); and signal mixer means (10, 10S) for mixing said compensation signal (ej) with said conveter input signal (ei) to produce said voltage/frequency conversion input (e10, elOS), characterized in that said counter means (24), digital/analog converter means (26), signal mixer means (10, 10S) and voltage/frequency conversion means (12) constitute a negative feedback loop which causes the value of the frequency (fc) of said voltage/frequency conversion output (eo) to follow said reference frequency (fo).

Claim 24

A voltage/frequency converter comprising: voltage/frequency converter means (12) for generating a voltage/frequency conversion output (eo, el2) having a frequency (fc) corresponding to the potential of a voltage/frequency conversion input (elO, elOS); reference signal source means (14) for generating a reference signal (e14) having a predetermined reference frequency (fo); counter means (24) for providing a digital count output (d24) which corresponds to the difference between the number of oscillations of said voltage/frequency conversion output (e12), obtained within a predetermined period of time, and the number of oscillations of said reference signal (e14), obtained within said predetermined period of time, said digital count output (d24) being incremented by either one of said voltage/ frequency conversion output (el2) and said reference signal (e14) and being decremented by the other; digital/analog converter means (26) for generating an analog compensation signal (ej) having a potential corresponding to said digital count output (d24); and signal mixer means (10, 10S) for mixing said compensation signal (ej) with said conveter input signal (ei) to produce said voltage/frequency conversion input (e10, elOS), characterized in that said counter means (24), digital/analog converter means (26), signal mixer means (10, 10S) and voltage/frequency conversion means (12) constitute a negative feedback loop which causes the value of the frequency (fc) of said voltage/frequency conversion output (eo) to follow said reference frequency (fo).

Claim 25

A voltage/frequency converter comprising: voltage/frequency converter means (12) for generating a voltage/frequency conversion output (eo, e12) having a frequency (fc) corresponding to the potential of a voltage/frequency converter input (elO, elOS); signal generator means (140 to 160) for generating a reference signal (e160) having a predetermined reference frequency (fo), generating a first latch pulse (e140) having a frequency (fo * ) higher than said reference frequency (fo), and generating a second latch pulse (e150) synchronized to but having a different generation timing from said first latch pulse (e140); first latch means (23A) for latching the signal level of said voltage/frequency conversion output (e12) by said first latch pulse (e140) to provide a first count signal (e23A); second latch means (23B) for latching the signal level of said reference signal (e160) by said second latch pulse (e150) to provide a second count signal (e23B); counter means (24) for providing a digital count output (d24) which corresponds to the difference between the number of oscillations of said first count signal (e23A), obtained within a predetermined period of time, and the number of oscillations of said second count signal (e23B), obtained within said predetermined period or time, said digital count output (d24) being incremented by either one of said first and second count signals (e23A, e23B) and being decremented by the other; digital/analog converter means (26) for converting said digital count output (d24) into an analog compensation signal (ej) having a potential corresponding to the content of said digital count output (d24); and signal mixer means (10, 10S) for mixing saia analog compensation signal (ej) with said conveter input signal (ei) to produce said voltage/frequency conversion input (elO, elOS), characterized in that said counter means (24), digital/analog converter means (26), signal mixer means (10, 10S), first and second latch means (23A, 23B) and voltage/frequency converter means (12) constitute a negative feedback loop to cause the value of the frequency (fc) of said voltage/frequency conversion output (eo) to follow said reference frequency (fo).

Claim 26

A voltage/frequency converter comprising: voltage/frequency converter means (12) for generating a voltage/frequency conversion output (eo, e12) having a frequency (fc) corresponding to the potential of a voltage/frequency converter input (elO, elOS); signal generator means (140 to 160) for generating a reference signal (e160) having a predetermined reference frequency (fo), generating a first latch pulse (e140) having a frequency (fo * ) higher than said reference frequency (fo), and generating a second latch pulse (e150) synchronized to but having a different generation timing from said first latch pulse (e140); first latch means (23A) for latching the signal level of said voltage/frequency conversion output (e12) by said first latch pulse (e140) to provide a first count signal (e23A); second latch means (23B) for latching the signal level of said reference signal (e160) by said second latch pulse (e150) to provide a second count signal (e23B); counter means (24) for providing a digital count output (d24) which corresponds to the difference between the number of oscillations of said first count signal (e23A), obtained within a predetermined period of time, and the number of oscillations of said second count signal (e23B), obtained within said predetermined period or time, said digital count output (d24) being incremented by either one of said first and second count signals (e23A, e23B) and being decremented by the other; digital/analog converter means (26) for converting said digital count output (d24) into an analog compensation signal (ej) having a potential corresponding to the content of said digital count output (d24); and signal mixer means (10, 10S) for mixing saia analog compensation signal (ej) with said conveter input signal (ei) to produce said voltage/frequency conversion input (elO, elOS), characterized in that said counter means (24), digital/analog converter means (26), signal mixer means (10, 10S), first and second latch means (23A, 23B) and voltage/frequency converter means (12) constitute a negative feedback loop to cause the value of the frequency (fc) of said voltage/frequency conversion output (eo) to follow said reference frequency (fo).