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EP0205712A2
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Video stream processing system
Assignee: Schlumberger Technologies Inc
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Filing: 1985-05-31
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Granted: —
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Expires: 2005-05-31
Abstract
Abstract A video stream processing system comprising a novel modular family of image processing and pattern recognition submodules is provided, with the submodules utilizing a unique system signalling and interface protocol, and thus can be cascaded and paralleled to produce complex special purpose image processing systems which can operate at video or near video data rates. A stream of digitized pixel data is pipelined through a variety of submodules to support a wide variety of image processing applications. A common video interface provides for handling pixel data in the video signal path and a processor interface allows communication to any modern microprocessor for overall system control, for optional additional image processing and for defining options within each submodule. In addition, a video stream processing system frame buffer controller is provided for controlling external dynamic random access memory (DRAM) of a frame buffer and interfacing to the video stream processing signal bus. The frame buffer controller has four interfaces; video input interface, video output interface, memory interface and processor interface. The circuit can input image data from a camera and store the frames in external DRAM. The circuit provides for external processor access to pixels in the frame buffer and for output of the frame or portions of the frame, as well as output of frames in a format of CRT display and external DRAM refresh. In addition, a video stream processing dither circuit for dithering gray level images for output to a bi-level display such as a dot matrix printer or bit-mapped CRT. The circuit includes an intensity correction look-up table and a resampling scaler capable of scaling independently in each dimension. The dither logic utilizes a varying thereshold with an alternating checkerboard pattern with the addition of random noise and allocation or error terms to adjacent image pixels.
Inventors
- 👤 Michael Deering
- 👤 J. Martin Tenenbaum
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 19:50
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/40; H04N1/405; H04N1/4051; H04N1/4052; H04N1/46; H04N1/56; H04N1/60; H04N1/6016; H04N1/6022
Claims Analysis
Total Claims: 193
Claim 1
Independent Claim
112 words
A video information processing system for modifying digital multi-level color video data, complsed of a pixel array wherein each pixel location comprises a plurality of basic color pixel values for output on a bi-level multi-color output device, the system characterized by: means for subtracting the lowest level pixel value from each pixel value for each pixel array location to produce modified color pixel values; means for generating a black pixel value corresponding to the lowest level for each pixel array location; and processing means for processing the modified color pixel values and the black pixel values into related binary video data generating output binary color video data for each pixel array location.
Claim 2
Dependent Claim
112 words
A video information processing system for modifying digital multi-level color video data, complsed of a pixel array wherein each pixel location comprises a plurality of basic color pixel values for output on a bi-level multi-color output device, the system characterized by: means for subtracting the lowest level pixel value from each pixel value for each pixel array location to produce modified color pixel values; means for generating a black pixel value corresponding to the lowest level for each pixel array location; and processing means for processing the modified color pixel values and the black pixel values into related binary video data generating output binary color video data for each pixel array location.
Claim 3
Dependent Claim
42 words
The system of Claim 1 characterized in that the means for subtracting further comprises comparator means for comparing the plurality of basic color pixel values for each pixel location to each other and generating control signals identifying the lowest level pixel value.
Claim 4
Dependent Claim
37 words
The system of Claim 1 or 2 characterized in that the means for generating a black pixel value comprises multiplexer means for selecting and outputting the lowest pixel value for each location responsive to the control signals.
Claim 5
Dependent Claim
34 words
The system of Claim 3 characterized in that the means for subtracting comprises subtractor means for subtracting the output of the multiplexer from each of the basic color pixel values and outputting the difference.
Claim 6
Independent Claim
20 words
The system of any of Claims 1 to 4 characterized in that the basic colors are Red, Green and Blue.
Claim 7
Independent Claim
20 words
The system of any of Claims 1 to .5 characterized in that the output device is a bi-level, cyan-magenta-yellow-black printer.
Claim 8
Independent Claim
41 words
The system of any of Claims 1 to 6 characterized in that the processing means processes pixels into binary video data based upon a variable threshold by operating upon each pixel and allocating error to adjacent pixels in the pixel array.
Claim 9
Dependent Claim
36 words
The system of Claim 7 characterized in that the processing means further comprises means for varying the threshold across the array of pixels alternately between an upper and a lower threshold according to a predetermined pattern.
Claim 10
Dependent Claim
39 words
The system of Claim 8 characterized in that the processing means further comprises means for accumulating an error term for each pixel and distributing the error term among adjacent unprocessed pixel values in the array in a predetermined proportion.
Claim 11
Independent Claim
132 words
A method of processing color video data comprised of multi-level pixel values for each of a plurality of basic input colors for each location in a pixel array, for output on a bi-level, multi-color output device, the method characterized by the steps of: subtracting the lowest level pixel value among the plurality of basic input colors from each pixel value for each location in the pixel array to generate modified color pixel values; generating a black video pixel value corresponding to the lowest pixel value from among the plurality of input colors for each pixel array location; and processing the modified color pixel values and the black video pixel value into binary video data thereby generating output binary pixels for each of the modified color pixel values and the black pixel value.
Claim 12
Independent Claim
132 words
A method of processing color video data comprised of multi-level pixel values for each of a plurality of basic input colors for each location in a pixel array, for output on a bi-level, multi-color output device, the method characterized by the steps of: subtracting the lowest level pixel value among the plurality of basic input colors from each pixel value for each location in the pixel array to generate modified color pixel values; generating a black video pixel value corresponding to the lowest pixel value from among the plurality of input colors for each pixel array location; and processing the modified color pixel values and the black video pixel value into binary video data thereby generating output binary pixels for each of the modified color pixel values and the black pixel value.
Claim 13
Dependent Claim
39 words
ll. The method of Claim 10 wherein the step of subtracting is characterized by comparing the plurality of basic color pixel values for each pixel location to each other and generating control signals identifying the lowest level pixel value.
Claim 14
Dependent Claim
40 words
The method of Claim 10 or 11 characterized in that the step of generating a black video pixel value further comprises the step of selecting and outputting the lowest pixel value for each array location responsive to the control signal.
Claim 15
Independent Claim
47 words
The method of any of Claims 10 to 12 characterized in that the step of processing further comprises the step of processing pixels into binary video data based upon a variable threshold by operating upon each pixel and allocating error to adjacent pixels in the pixel array.
Claim 16
Dependent Claim
34 words
The method of Claim 13 characterized in that the step of processing further comprises varying the threshold across the array of pixels alternately between an upper and a lower threshold according to a pattern.
Claim 17
Dependent Claim
243 words
Digital video information control apparatus for use with a video processing system in conjunction witn a digital memory for control and storage of digital video information, characterized by: (a) programmable input means, for input of digital video information for selective storage in the digital memory and for output of digital video information, the input means comprising a plurality of programmable control registers for controlling the input means; video input buffers for buffered input and output of digital video information; a plurality of control signal inputs for input of data validation and synchronization signals, and a clock input; (b) programmable output means, for selective output of digital video information stored in the digital memory, the output means comprising a plurality of programmable control registers for controlling the output means; video output buffers for buffering output of digital video information; a plurality of control signal outputs for output of data validation and synchronization signals, and a clock signal output; (c) processor interface means, coupled to the video input and output buffers and the programmable registers, for bidirectional exchange of data with the input buffers for storage to and recall from the digital memory and for transfer of control data to the programmable registers; and (d) memory interface means, for exchange of digital video data with the digital memory and the video buffers and for providing control signals for control of the memory responsive to control signals from the input and output means programmable control registers.
Claim 18
Dependent Claim
243 words
Digital video information control apparatus for use with a video processing system in conjunction witn a digital memory for control and storage of digital video information, characterized by: (a) programmable input means, for input of digital video information for selective storage in the digital memory and for output of digital video information, the input means comprising a plurality of programmable control registers for controlling the input means; video input buffers for buffered input and output of digital video information; a plurality of control signal inputs for input of data validation and synchronization signals, and a clock input; (b) programmable output means, for selective output of digital video information stored in the digital memory, the output means comprising a plurality of programmable control registers for controlling the output means; video output buffers for buffering output of digital video information; a plurality of control signal outputs for output of data validation and synchronization signals, and a clock signal output; (c) processor interface means, coupled to the video input and output buffers and the programmable registers, for bidirectional exchange of data with the input buffers for storage to and recall from the digital memory and for transfer of control data to the programmable registers; and (d) memory interface means, for exchange of digital video data with the digital memory and the video buffers and for providing control signals for control of the memory responsive to control signals from the input and output means programmable control registers.
Claim 19
Dependent Claim
62 words
The apparatus of Claim 15 characterized by differential counter means, coupled to the input means, the output means and the processor interface means, for controlling simultaneous input of digital video data to the input means and output of digital video data from the output means responsive to the control data to prevent incoming data from overwriting outgoing data in the digital memory.
Claim 20
Dependent Claim
69 words
The apparatus of Claim 16 characterized in that the differential counter means comprises a counter which is incremented responsive to an input means synchronization signal, and decremented responsive to an output means synchronization signal, and further conprised means for disabling the input interface when the counter is zero and enabling the input interface when the counter is non-zero and when the outgoing data reaches the end of a frame.
Claim 21
Independent Claim
32 words
The apparatus of any of Claims 15 to 17 characterized by means for de-interlacing video information supplied in a two field interlaced format and storing the video information in continuous memory locations.
Claim 22
Independent Claim
33 words
The apparatus of any of Claims 15 to 17 characterized by means for interlacing output of digital video information from the digital memory and for generating appropriate synchronization signals for an interlaced display.
Claim 23
Independent Claim
51 words
The apparatus of any of Claims 15 to 19 characterized by means for output of digital video information stored in the digital memory in the form of an image frame, wherein the digital video information is output in a sideways fashion accessing digital video data by successive columns across the frame.
Claim 24
Independent Claim
67 words
The apparatus of any of Claims 15 to 20 characterized in that the processor interface means is further corprised of means for processor enabling of a direct pixel access flag and means for coupling video data from any memory location in the digital memory to the processor interface means, responsive to the direct pixel access flag and input of a memory address through the processor interface means.
Claim 25
Independent Claim
29 words
The apparatus of any of Claims 15 to 21 characterized in that the digital memory is a dynamic random access memory (DRAM) further comprising refresh means for automatically refreshing.
Claim 26
Dependent Claim
122 words
A frame buffer controller system for coupling to a stream of pixel data of video image signal, characterized by: read-write memory for selectively storing and outputting the pixel data; video input interface means for selectively inputting and storing the pixel data; video output means for selectively buffering and outputting the pixel data; controller interface means coupled to the memory and to the video input interface and to the video output interface for controlling memory bidirectional access responsive to the video input and output interface; processor interface means for providing control signals to interface means, and for communicating data with the video input and output; wherein said image video signal data storage and retrieval of said memory is responsive to said control signals.
Claim 27
Dependent Claim
122 words
A frame buffer controller system for coupling to a stream of pixel data of video image signal, characterized by: read-write memory for selectively storing and outputting the pixel data; video input interface means for selectively inputting and storing the pixel data; video output means for selectively buffering and outputting the pixel data; controller interface means coupled to the memory and to the video input interface and to the video output interface for controlling memory bidirectional access responsive to the video input and output interface; processor interface means for providing control signals to interface means, and for communicating data with the video input and output; wherein said image video signal data storage and retrieval of said memory is responsive to said control signals.
Claim 28
Dependent Claim
22 words
The system as in Claim 23 characterized in that said memory is dynamic RAM (DRAM), and said controller additionally manages DRAM refresh.
Claim 29
Dependent Claim
17 words
The system as in Claim 24 characterized in that said controller accesses said DRAM in nibble mode.
Claim 30
Independent Claim
39 words
The system as in any of Claims 23 to 25 characterized in that said controller internally buffers the read and write of data to the memory, wherein said system simultaneously inputs and outputs data from the frame buffer system.
Claim 31
Dependent Claim
46 words
The system as in any of Claim 23 to 26 characterized in that said controller internally buffers the read and write of data to -the memory, internally interleaving data, so as to provide for effective simultaneous input and output of data from the frame buffer system.
Claim 32
Independent Claim
46 words
The system as in any of Claims 23 to 27 characterized in that, said video input and video output interface are each further comprised of control registers, programmable responsive to said processor interface means, for controlling sequencing of storage and retrieval of data from said memory.
Claim 33
Dependent Claim
52 words
The system as in Claim 28 characterized in that said control registers are further comprised of: interface registers, readable and writable responsive to the processor interface means; working registers, coupled to communicate with said interface registers; wherein said working registers control the sequencing of the storage and retrieval of data from memory.
Claim 34
Dependent Claim
97 words
A video signal processing system characterized by: means for coupling to a video signal source of pixel data; a modular family of vision processing subsystems, each having a processor interface and a video interface; said video interface providing a pixel clock signal, a line synchronization signal, a frame synchronization signal, and pixel data; and said processor interface connectable to a processor and including means for selectively enabling said processor interface; means for delaying data transfer between the processor and selected subsystem; a common bus; and means for designating data on the cormmon bus as address or data.
Claim 35
Dependent Claim
97 words
A video signal processing system characterized by: means for coupling to a video signal source of pixel data; a modular family of vision processing subsystems, each having a processor interface and a video interface; said video interface providing a pixel clock signal, a line synchronization signal, a frame synchronization signal, and pixel data; and said processor interface connectable to a processor and including means for selectively enabling said processor interface; means for delaying data transfer between the processor and selected subsystem; a common bus; and means for designating data on the cormmon bus as address or data.
Claim 36
Dependent Claim
38 words
The system as in Claim 30 characterized in that said family of subsystems are characterized by: a plurality of functionally distinct subsystems; and a plurality of at least one of said distinct subsystems, cascaded together for parallel operation.
Claim 37
Dependent Claim
42 words
The system as in Claim 30 or 31 characterized in that said family of subsystems is characterized by: a plurality of functionally distinct subsystems, coupled together through a plurality of distinct video interface buses, for providing pipelined parallel processing of pixel data..
Claim 38
Independent Claim
20 words
The system as in any of Claims 30 to 32 characterized in that said video interface signals are selectively bidirectional.
Claim 39
Dependent Claim
22 words
The system as in Claim 33 characterized in that said video interface signal bidirectionality is programmable responsive to said processor interface signals.
Claim 40
Independent Claim
25 words
The system as in any of Claims 30 to 34 characterized in that said pixel data is digitized to at least 1 bit per pixel.
Claim 41
Independent Claim
20 words
The system as in any of Claims 30 to 35 characterized in that said pixel data is packed binary data.
Claim 42
Independent Claim
20 words
The system as in any of Claims 30 to 35 characterized in that said pixel data is grey scale data.
Claim 43
Independent Claim
36 words
The system as in any of Claims 30 to 37 characterized in that said video signal source is from the class of a video camera, a digital communications line, and one of said plurality of subsystems.
Claim 44
Dependent Claim
95 words
A video information processing system, characterized by: a video signal source for outputting a video signal; a modular family comprising a plurality of subsystems for processing video information; wherein communication means between the subsystems comprises a video interface and a processor interface; said video interface comprising pixel data and synchronization signals for pixel, line and frame; said processor interface comprising a processor interface activation signal, a transfer delay signal, and data signals; wherein each subsystem comprises means for interactively responding to said video and processor interfaces so as to effect characterization of said video signal.
Claim 45
Dependent Claim
95 words
A video information processing system, characterized by: a video signal source for outputting a video signal; a modular family comprising a plurality of subsystems for processing video information; wherein communication means between the subsystems comprises a video interface and a processor interface; said video interface comprising pixel data and synchronization signals for pixel, line and frame; said processor interface comprising a processor interface activation signal, a transfer delay signal, and data signals; wherein each subsystem comprises means for interactively responding to said video and processor interfaces so as to effect characterization of said video signal.
Claim 46
Dependent Claim
29 words
The system as in Claim 39 characterized in that said video signal is a stream of a plurality of images, said stream outputting images for processing at video rates.
Claim 47
Dependent Claim
49 words
The system as in Claim 39 or 40 characterized in that at least one subsystem is further comprised of two independently operable video interfaces, and means for delaying transfer of pixel data via one video interface to synchronize with the transfer of pixel data on the other video interface.
Claim 48
Dependent Claim
23 words
The system as in Claim 40 characterized in that said stream of images comprises a plurality of temporally spaced outputs of pixel data.
Claim 49
Dependent Claim
61 words
The system as in Claim 42 characterized in that said stream of images of pixel data is output from a first one of said subsystems, wherein said first subsystem is comprised of: means for selectively inhibiting output of the next temporal output from said first subsystem responsive to said pixel synchronization signal being externally asserted during the then current temporal output.
Claim 50
Dependent Claim
34 words
The system as in Claim 43 characterized by: means for selectively enabling output of the next temporal output from said first subsystem responsive to release of said external asserting of said pixel synchronization signal.
Claim 51
Independent Claim
28 words
The system as in any of Claims 39 to 44 characterized in that at least one subsystem provides a video interface output derectly compatible with a display device.
Claim 52
Dependent Claim
23 words
The system as in Claim 45 characterized in that said display device is a CRT, a hard copy peripheral or a standard television.
Claim 53
Independent Claim
36 words
The system as in any of Claims 39 to 46 characterized in that said processor interface further comprises a data designator signal for indicating the address or data characteristic of the data signals presently being interfaced.
Claim 54
Independent Claim
41 words
The system as in any of Claims 39 to 46 characterized in that at least one of said plurality of subsystems is further comprised of means for selectively communicating said video signals via said video interface responsive to said processor interface.
Claim 55
Independent Claim
81 words
The system as in any of Claims 39 to 46 characterized in that at least one of said plurality of subsystems is further comprised of: means for storing during a current frame, next frame video processing instructions, responsive to said processor interface signals; means for coupling said video signals as pixel data on said video interface; and means for effecting characterization of said video signal pixel data when said next frame becomes current, responsive to said previously stored next frame instructions.
Claim 56
Independent Claim
28 words
The system as in any of Claims 39 to 49 characterized in that said video signal source is a video camera, or one of said plurality of subsytems.
Claim 57
Independent Claim
22 words
The system as in any of Claims 39 to 50 characterized in that said video signal is comprised of digitized pixel data.
Claim 58
Independent Claim
38 words
The system as in any of Claims 39 to 51 characterized in that said subsystem is further comprised of: a system clock; and means responsive to said synchronization signals for transferring pixel data asynchronously to said system clock.
Claim 59
Independent Claim
24 words
The system as in any of Claims 39 to 52 characterized in that a plurality of said subsystems concurrently process pixel data in parallel.
Claim 60
Dependent Claim
27 words
The system as in Claim 53 characterized by a plurality of video interface buses, independently and exclusively coupling between the video interfaces of a plurality of subsystems.
Claim 61
Dependent Claim
28 words
The system as in Claim 54 characterized in that said plurality of subsystems process said pixel data in a pipelined manner utilizing said plurality of video interface buses.
Claim 62
Independent Claim
30 words
The system as in any of Claims 39 to 55 characterized in that said line and frame synchronization signals define variably sized line and frame boundaries for said pixel data.
Claim 63
Independent Claim
49 words
The system as in any of Claims 39 to 56 characterized in that at least one of said plurality of subsystems is characterized by: window means for constructing an N x M window of pixel data; and extraction means for providing characteristic data on said N x M window.
Claim 64
Dependent Claim
31 words
The system as in Claim 57 wherein said means for providing characteristic data is further conprised of means for performing N 2 parallel processing operations on said N x M window.
Claim 65
Dependent Claim
41 words
The system as in Claim 57 wherein said window means constructs a moving stream of N x M windows, and wherein said extraction means provides an output stream of characteristic data responsive to said moving stream of N x M windows.
Claim 66
Dependent Claim
12 words
The system as in Claim 57 wherein N = M = 3.
Claim 67
Dependent Claim
12 words
The system as, in Claim 57 wherein N = M = 5.
Claim 68
Dependent Claim
161 words
The system as in Claim 57 wherein said window means is further comprised of: a plurality of N delays means, including first and last delay means, each delay means having M storage units, each delay means providing for selective shifting of pixel data unidirectionally between the M storage units of said delay means so as to effect a temporal delay of M shift times, the input of said first delay means coupled to receive the output pixel data from the video interface of one of said plurality of subsystems, the output of each said N delay means coupling to a separate one of N video interface inputs of a second one of said plurality of subsystems having N video interfaces, the outputs of all but the last delay means coupling to the input of a next delay means, wherein said plurality of N delay means provides N temporally staggered streams of M units of pixel data output to said second subsystem.
Claim 69
Independent Claim
53 words
The system as in any of Claims 39 to 62 at least one of said plurality of subsystems is characterized by: frame buffer means comprising: means for selectively storing and retrieving said pixel data in a read/write memory; and means for communicating said pixel data between said read/write memory and said video interface.
Claim 70
Independent Claim
55 words
The system as in any of Claims 39 to 63 characterized in that at least one of said plurality of subsystems is characterized by: frame buffer means comprising: means for selectively sorting and retrieving said pixel in a read/write memory; and means for communicating said pixel data between said read/write memory and said processor interface.
Claim 71
Dependent Claim
127 words
The system as in any of Claim 39 to 64 characterized in that said pixel data is digital grey-scale data comprising an array of pixels representing a two-dimensional bounded image; wherein at least one of said plurality of subsystems is characterized by: dithering means for inputting the digitized grey-scale data through the video interface, said dithering means comprising: modification means for modifying the intensity characteristics of digitized grey-scale data responsive to the processor interface signals; scaling means for selectively compressing and expanding scaling of the digitized grey-scale data independently in each of the two dimensions responsive to the processor interface signals; process means for variably threshholding said digitized grey-scale data; wherein said dithering means outputs a dithered bi-tonal output representative of the input digitized grey-scale video data.
Claim 72
Independent Claim
43 words
The system as in any of Claims 39 to 65 characterized in that at least one of said plurality of subsystems is characterized by: means for outputting characteristic data representative of statistical analysis of said pixel data responsive to said processor interface signals.
Claim 73
Dependent Claim
39 words
The system as in Claim 39 wherein at least one of said plurality of subsystems is further comprised of: means for transforming in space said pixel data as input through the video interface, responsive to said processor interface signals.
Claim 74
Dependent Claim
47 words
The system as in Claim 39 wherein at least one of said plurality of said plurality of subsystems is further comprised of: means for functionally mapping from pixel data, as input through the video interface, to characteristic data for output as pixel data through the video interface.
Claim 75
Dependent Claim
69 words
The system as in Claim 57 wherein at least one of said plurality of subsystems is further comprised of: video processor means, comprising a plurality of video interfaces each coupled to a separate video stream of said window of pixel data for loading registers internal to said video processor in an interleaved manner wherein said video processor processes said windows of pixel data in parallel, in a pipelined manner.
Claim 76
Dependent Claim
26 words
The system as in Claim 58 characterized by: a user interface system for communicating user commands to the system and the system responses to the user.
Claim 77
Dependent Claim
69 words
The system as in Claim 58 wherein said plurality of subsystems is further comprised of: frame buffer means coupled to said signal output from said video source for storing pixel data representive of video source signal output; window generating means for constructing an N x M window comprising a plurality of N-time-staggered streams of M-time units of temporally spaced pixel data; processing said window of pixel data pipelined-interleaved fashion.
Claim 78
Dependent Claim
189 words
A video stream processing system for processing digitized video information, characterized by: control processor means for providing control signals and for processing data signals; a plurality of video signal processing elements each having an input port including a digital video information stream input, a video pixel clock input, a control signal input, a plurality of synchronization signal inputs, said plurality of video signal processing elements including, frame buffer means, having processor interface port coupled to the control processor, and having an input and an output port, for storage in a digital memory of digitized video information received from at least one of a plurality of ports including the input port and the processor interface port, and for controlled output of the stored digitized video information through at least one of a plurality of ports-including the input port, the output port and the processor interface port, responsive to control processor means control signals; and characterization means, having a processor interface port selectively activatable responsive to an activation signal, for extractingcharacteristic data from digitized video information output from the frame buffer means responsive to the control signals from the processor means.
Claim 79
Dependent Claim
189 words
A video stream processing system for processing digitized video information, characterized by: control processor means for providing control signals and for processing data signals; a plurality of video signal processing elements each having an input port including a digital video information stream input, a video pixel clock input, a control signal input, a plurality of synchronization signal inputs, said plurality of video signal processing elements including, frame buffer means, having processor interface port coupled to the control processor, and having an input and an output port, for storage in a digital memory of digitized video information received from at least one of a plurality of ports including the input port and the processor interface port, and for controlled output of the stored digitized video information through at least one of a plurality of ports-including the input port, the output port and the processor interface port, responsive to control processor means control signals; and characterization means, having a processor interface port selectively activatable responsive to an activation signal, for extractingcharacteristic data from digitized video information output from the frame buffer means responsive to the control signals from the processor means.
Claim 80
Dependent Claim
78 words
The system as in Claim 71 characterized by: a device to be inspected and characterized; handling means for selectively manipulating said device from an initial position, to a viewing position, and to a final position, responsive to said control signals; viewing means for providing digitized video information representative of the device when the device is positioned in the viewing position, responsive to said control signals; and means for coupling said digitized video information to said frame buffer means.
Claim 81
Dependent Claim
30 words
The system as in Claim 73 wherein said control processor provides control signals to manipulate said device to one of a plurality of final positions responsive to said characterization means.
Claim 82
Dependent Claim
13 words
The system as in Claim 74 wherein said device is a semiconductor component.
Claim 83
Dependent Claim
150 words
A video image processing system, characterized by: first means for acquiring a digitized video image, and outputting representative pixel data; second means for processing said video image to enhance selected characteristics thereof, and outputting representative pixel data; third means for providing characterization data responsive to feature extraction of said video image, and outputting representative pixel data; fourth means for classification of said video image responsive to said characterization data, and outputting representative pixel data; a system clock; wherein each of said first, second, third and fourth means is further comprised of: video interface means for communicating said pixel data, and pixel synchronization data between said first, second, third and fourth means; wherein at least two of said first, second, third and fourth means are further comprised of means for communicating said pixel data between said at least two means asynchronously to said system clock responsive to said pixel synchronization data.
Claim 84
Dependent Claim
150 words
A video image processing system, characterized by: first means for acquiring a digitized video image, and outputting representative pixel data; second means for processing said video image to enhance selected characteristics thereof, and outputting representative pixel data; third means for providing characterization data responsive to feature extraction of said video image, and outputting representative pixel data; fourth means for classification of said video image responsive to said characterization data, and outputting representative pixel data; a system clock; wherein each of said first, second, third and fourth means is further comprised of: video interface means for communicating said pixel data, and pixel synchronization data between said first, second, third and fourth means; wherein at least two of said first, second, third and fourth means are further comprised of means for communicating said pixel data between said at least two means asynchronously to said system clock responsive to said pixel synchronization data.
Claim 85
Dependent Claim
96 words
A video information processing system for coupling to a control processor comprising: video signal means for providing a video signal conprising pixel data, and signals for line and frame synchronization; and a plurality of subsystems each comprising: video interface means for coupling pixel data to said subsystem responsive to said video signal; processor interface means selectively actuatable for bidirectionally communicating address, control and data signals between the control processor; and a plurality of mutually exclusive video interface buses for coupling video signals to respective video interface means among the subsystems, and from the video signal means.
Claim 86
Dependent Claim
96 words
A video information processing system for coupling to a control processor comprising: video signal means for providing a video signal conprising pixel data, and signals for line and frame synchronization; and a plurality of subsystems each comprising: video interface means for coupling pixel data to said subsystem responsive to said video signal; processor interface means selectively actuatable for bidirectionally communicating address, control and data signals between the control processor; and a plurality of mutually exclusive video interface buses for coupling video signals to respective video interface means among the subsystems, and from the video signal means.
Claim 87
Dependent Claim
49 words
The system as in Claim 77 characterized by a system clock; wherein said video signal is further conprised of a pixel synchronization signal; and wherein said video interface means of each subsystem is responsive to said pixel synchronization signal for communicating pixel data asynchronously relative to said system clock.
Claim 88
Dependent Claim
23 words
The system as in Claim 77 wherein each video interface bus can operate asynchronously relative to other ones of the video interface buses.
Claim 89
Dependent Claim
18 words
The system as in Claim 77 wherein said video interface provides for bidirectional communications of said video signal.
Claim 90
Dependent Claim
23 words
The system as in Claim 77 wherein said video signal means provides a video stream of a plurality of temporally spaced video signals.
Claim 91
Dependent Claim
39 words
The system as in Claim 81 characterized in that said plurality of subsystems further comprises a delay means subsystem which selectively provides a temporally delayed output of a selected portion of said video stream input to said first subsystem.
Claim 92
Dependent Claim
34 words
The system as in Claim 82 characterized in that a plurality of said delay means subsystems are interconnected so as to provide a time-staggered parallel output of different selected portions of said video stream.
Claim 93
Dependent Claim
23 words
The system as in Claim 83 characterized in that said plurality of delay means provides said parallel outputs responsive to said processor means.
Claim 94
Dependent Claim
49 words
The system as in Claim 83 characterized in that each delay means is further comprised of a shift register for storing its respective selected portion of said video stream; wherein said plurality of delay means provides a time-staggered moving window of temporally spaced video-signals representative of said video stream.
Claim 95
Dependent Claim
30 words
The system as in Claim 85 wherein at least one of said plurality of subsystems is further comprised of: means for interleaved parallel processing said moving window of video signals.
Claim 96
Dependent Claim
32 words
The system as in Claim 83 wherein said plurality of delay means can operate asynchronously relative to one another to provide asynchronously time-staggered parallel outputs of selected portions of the video stream.
Claim 97
Dependent Claim
78 words
The system as in Claim 77 wherein at least one of said plurality of subsystems is coupled to a display device. Dear Sirs, Re : European Patent Application 85401073.3 FAIRCHILD CAMERA AND INSTRUMENT CORPORATION Our Ref. : 67.025/26/27 Replying to your letter of 6 November 1985 related to the above-mentioned European patent application and in accordance with Rules 41 and 88, we request that sheets 2 and 5 to 9 of drawings be corrected as indicated below :
Claim 98
Dependent Claim
3 words
In Figure 1B:
Claim 99
Dependent Claim
3 words
In Figure 1B:
Claim 100
Dependent Claim
147 words
- cancel "VALID" and "CLOCK" and respectively replace by "PIXEL VALID" and "PIXEL CLOCK". In Figure 4A: - cancel numeral "419" (two occurrencies) and replace by "22' "; - add numeral "453" to designate the DATA bus between block 450 and block 430; - add numeral "451" to designate the ADDRESS and CONTROL bus between block 450 and block 430: - add numeral "435" to designate the bus between block 430 and block 425: - add numeral "433" to designate the bus between block 424 and block 430: - add numeral "431" to designate the bus between block 414 and block 430; - add numeral "445" to designate the bus between block 416 and block 414; - add numeral "443" to designate the block "INTERFACE": - add numeral "447" to designate the bus between block 443 and block 440; - cancel numeral "449" and replace by "36".
Claim 101
Dependent Claim
147 words
- cancel "VALID" and "CLOCK" and respectively replace by "PIXEL VALID" and "PIXEL CLOCK". In Figure 4A: - cancel numeral "419" (two occurrencies) and replace by "22' "; - add numeral "453" to designate the DATA bus between block 450 and block 430; - add numeral "451" to designate the ADDRESS and CONTROL bus between block 450 and block 430: - add numeral "435" to designate the bus between block 430 and block 425: - add numeral "433" to designate the bus between block 424 and block 430: - add numeral "431" to designate the bus between block 414 and block 430; - add numeral "445" to designate the bus between block 416 and block 414; - add numeral "443" to designate the block "INTERFACE": - add numeral "447" to designate the bus between block 443 and block 440; - cancel numeral "449" and replace by "36".
Claim 102
Dependent Claim
3 words
In Figure 4G:
Claim 103
Dependent Claim
3 words
In Figure 4G:
Claim 104
Dependent Claim
22 words
- add numerals "453" and "451" to designate the left and right buses respectively between the block "RAM" and the block 430;
Claim 105
Dependent Claim
22 words
- add numerals "453" and "451" to designate the left and right buses respectively between the block "RAM" and the block 430;
Claim 106
Dependent Claim
20 words
- add numerals "433" and "435" to designate the left and right buses respectively between block 430 and block 420;
Claim 107
Dependent Claim
20 words
- add numerals "433" and "435" to designate the left and right buses respectively between block 430 and block 420;
Claim 108
Dependent Claim
12 words
- add number "429" to designate the right output of block 420.
Claim 109
Dependent Claim
12 words
- add number "429" to designate the right output of block 420.
Claim 110
Dependent Claim
5 words
In Figures 4C and 4D:
Claim 111
Dependent Claim
5 words
In Figures 4C and 4D:
Claim 112
Dependent Claim
6 words
- cancel the indication "DATA ADDRESS";
Claim 113
Dependent Claim
6 words
- cancel the indication "DATA ADDRESS";
Claim 114
Dependent Claim
20 words
- add numerals "453" and "451" to designate the left and right buses respectively between block 450 and block 430;
Claim 115
Dependent Claim
20 words
- add numerals "453" and "451" to designate the left and right buses respectively between block 450 and block 430;
Claim 116
Dependent Claim
20 words
- add numerals "445" and "431" to designate the left and right buses respectively between block 430 and block 410;
Claim 117
Dependent Claim
20 words
- add numerals "445" and "431" to designate the left and right buses respectively between block 430 and block 410;
Claim 118
Dependent Claim
15 words
- add numeral "22' " to designate the bus on the left of block 410.
Claim 119
Dependent Claim
15 words
- add numeral "22' " to designate the bus on the left of block 410.
Claim 120
Dependent Claim
5 words
In Figures 4E and 4F:
Claim 121
Dependent Claim
5 words
In Figures 4E and 4F:
Claim 122
Dependent Claim
20 words
- add numerals "453" and "451" to designate the left and right buses respectively between block 450 and block 430;
Claim 123
Dependent Claim
20 words
- add numerals "453" and "451" to designate the left and right buses respectively between block 450 and block 430;
Claim 124
Dependent Claim
20 words
- add a new line connecting block 410 to bus 451 and add numeral "431" to designate this new line;
Claim 125
Dependent Claim
20 words
- add a new line connecting block 410 to bus 451 and add numeral "431" to designate this new line;
Claim 126
Dependent Claim
14 words
- add numeral "445" to designate the bus between block 430 and block 410;
Claim 127
Dependent Claim
14 words
- add numeral "445" to designate the bus between block 430 and block 410;
Claim 128
Dependent Claim
17 words
- add numeral "36' " to designate the bus connected to the lower end of block 440.
Claim 129
Dependent Claim
17 words
- add numeral "36' " to designate the bus connected to the lower end of block 440.
Claim 130
Dependent Claim
3 words
In Figure 5A:
Claim 131
Dependent Claim
3 words
In Figure 5A:
Claim 132
Dependent Claim
15 words
- add numeral "26' " to designate the dotted line around blocks 308 and 340:
Claim 133
Dependent Claim
15 words
- add numeral "26' " to designate the dotted line around blocks 308 and 340:
Claim 134
Dependent Claim
13 words
- add numeral "311" to designate the bus between blocks 310 and 312:
Claim 135
Dependent Claim
13 words
- add numeral "311" to designate the bus between blocks 310 and 312:
Claim 136
Dependent Claim
13 words
- add numeral "313" to designate the bus between blocks 312 and 320:
Claim 137
Dependent Claim
13 words
- add numeral "313" to designate the bus between blocks 312 and 320:
Claim 138
Dependent Claim
13 words
- add numeral "332" to designate the bus between blocks 312 and 350:
Claim 139
Dependent Claim
13 words
- add numeral "332" to designate the bus between blocks 312 and 350:
Claim 140
Dependent Claim
13 words
- add numeral "351" to designate the bus between blocks 350 and 320:
Claim 141
Dependent Claim
13 words
- add numeral "351" to designate the bus between blocks 350 and 320:
Claim 142
Dependent Claim
13 words
- add numeral "323" to designate the bus between blocks 320 and 322:
Claim 143
Dependent Claim
13 words
- add numeral "323" to designate the bus between blocks 320 and 322:
Claim 144
Dependent Claim
10 words
- cancel numeral "321" and replace by numeral "34' ":
Claim 145
Dependent Claim
10 words
- cancel numeral "321" and replace by numeral "34' ":
Claim 146
Dependent Claim
22 words
- add a new dotted line in and out of block 34' and designate this new dotted line by numeral "36' ";
Claim 147
Dependent Claim
22 words
- add a new dotted line in and out of block 34' and designate this new dotted line by numeral "36' ";
Claim 148
Dependent Claim
19 words
- cancel "CLOCK" and "VALID" in block 340 (two occurrencies) and replace by "PIXEL CLOCK" and "PIXEL VALID" respectively:
Claim 149
Dependent Claim
19 words
- cancel "CLOCK" and "VALID" in block 340 (two occurrencies) and replace by "PIXEL CLOCK" and "PIXEL VALID" respectively:
Claim 150
Dependent Claim
18 words
- add a new input dotted line indicated "22' " at the lower left corner of Figure 5A;
Claim 151
Dependent Claim
18 words
- add a new input dotted line indicated "22' " at the lower left corner of Figure 5A;
Claim 152
Dependent Claim
10 words
- cancel numeral "330" and replace by numeral "28' ":
Claim 153
Dependent Claim
10 words
- cancel numeral "330" and replace by numeral "28' ":
Claim 154
Dependent Claim
15 words
- add a new output dotted line at the lower right corner of block 34'.
Claim 155
Dependent Claim
15 words
- add a new output dotted line at the lower right corner of block 34'.
Claim 156
Dependent Claim
3 words
In Figure 5B:
Claim 157
Dependent Claim
3 words
In Figure 5B:
Claim 158
Dependent Claim
10 words
- add numeral "500" to designate the block named MESH+,
Claim 159
Dependent Claim
10 words
- add numeral "500" to designate the block named MESH+,
Claim 160
Dependent Claim
10 words
- add numeral "502" to designate the block named MESH-,
Claim 161
Dependent Claim
10 words
- add numeral "502" to designate the block named MESH-,
Claim 162
Dependent Claim
19 words
- add numeral "504" to designate the block named MUX connected to the outputs of blocks 500 and 502,
Claim 163
Dependent Claim
19 words
- add numeral "504" to designate the block named MUX connected to the outputs of blocks 500 and 502,
Claim 164
Dependent Claim
12 words
- add numeral "506" to designate the block named X + Y,
Claim 165
Dependent Claim
12 words
- add numeral "506" to designate the block named X + Y,
Claim 166
Dependent Claim
10 words
- add numeral "510" to designate the block named NOISE,
Claim 167
Dependent Claim
10 words
- add numeral "510" to designate the block named NOISE,
Claim 168
Dependent Claim
19 words
- add numeral "508" to designate the block named MUX connected to the outputs of blocks 504 and 510,
Claim 169
Dependent Claim
19 words
- add numeral "508" to designate the block named MUX connected to the outputs of blocks 504 and 510,
Claim 170
Dependent Claim
10 words
- add numeral "510" to designate the block named "+",
Claim 171
Dependent Claim
10 words
- add numeral "510" to designate the block named "+",
Claim 172
Dependent Claim
10 words
- add numeral "514" to designate the block named ">?"
Claim 173
Dependent Claim
10 words
- add numeral "514" to designate the block named ">?"
Claim 174
Dependent Claim
14 words
- aaa numeral "511" to designate the input named "NEXT PIXEL" to block 510,
Claim 175
Dependent Claim
14 words
- aaa numeral "511" to designate the input named "NEXT PIXEL" to block 510,
Claim 176
Dependent Claim
14 words
- add numeral "512" to designate the input of block 514 from block 510,
Claim 177
Dependent Claim
14 words
- add numeral "512" to designate the input of block 514 from block 510,
Claim 178
Dependent Claim
14 words
- add numeral "518" to designate the output named "VSP OUT" from block 514,
Claim 179
Dependent Claim
14 words
- add numeral "518" to designate the output named "VSP OUT" from block 514,
Claim 180
Dependent Claim
12 words
- cancel "MUX" in block 508 and replace by the sign "+",
Claim 181
Dependent Claim
12 words
- cancel "MUX" in block 508 and replace by the sign "+",
Claim 182
Dependent Claim
14 words
- cancel the sign ">?" in block 514 and replace by the word "COMPARATOR",
Claim 183
Dependent Claim
14 words
- cancel the sign ">?" in block 514 and replace by the word "COMPARATOR",
Claim 184
Dependent Claim
18 words
- add numeral "353" to designate the block named "NOISE" at the upper right portion of figure 5B,
Claim 185
Dependent Claim
18 words
- add numeral "353" to designate the block named "NOISE" at the upper right portion of figure 5B,
Claim 186
Dependent Claim
21 words
- add numeral "351" to designate the 3 inputs of the "MUX" block at the upper right portion of Figure 5B,
Claim 187
Dependent Claim
21 words
- add numeral "351" to designate the 3 inputs of the "MUX" block at the upper right portion of Figure 5B,
Claim 188
Dependent Claim
30 words
- draw a short line and add the expression "SELECT FROM ADDRESS COUNTER CRT" on the right side of the "MUX" block at the upper right portion of Figure 5.
Claim 189
Dependent Claim
30 words
- draw a short line and add the expression "SELECT FROM ADDRESS COUNTER CRT" on the right side of the "MUX" block at the upper right portion of Figure 5.
Claim 190
Dependent Claim
39 words
The above corrections are in accordance with the observations disclosed in your letter dated 6 November 1985. These corrections are obvious in view of the description and are intended only to bring the figures in conformity with the description.
Claim 191
Dependent Claim
39 words
The above corrections are in accordance with the observations disclosed in your letter dated 6 November 1985. These corrections are obvious in view of the description and are intended only to bring the figures in conformity with the description.
Claim 192
Dependent Claim
35 words
These corrections are included in sheets 2 and 5 to 9 of drawings which were filed with our letter of 17 September 1985. Therefore we request that the corrected drawings be published with the application.
Claim 193
Dependent Claim
35 words
These corrections are included in sheets 2 and 5 to 9 of drawings which were filed with our letter of 17 September 1985. Therefore we request that the corrected drawings be published with the application.
References Cited (Backward Citations)
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