Patent EP0198569A1 successfully refreshed from Google Patents.
EP0198569A1
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EP
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Monolithic integrated circuits having protection against latch-up
Assignee: Siliconix Ltd
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Filing: 1986-01-15
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Granted: —
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Expires: 2006-01-15
Abstract
Abstract It is well known that in certain structures of monolithic integrated circuitry, parasitic thyristor action (via 18-10-11-13) can lead to latch-up and subsequent destruction of the circuit. This specification discloses a totally isolated diode (40) in series with a supply terminal to the circuit: in normal operation such a diode (40) would be forward biased, but under the conditions required for latch-up, it becomes reverse biased, preventing the current flow that would otherwise allow the thyristor to turn on.
Inventors
- 👤 Stephen Davies
- 👤 Keith Davies
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 20:06
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/854
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
63 words
A monolithic integrated circuit having a parasitic-four layer structure of alternating polarity types (18-10-11-13), and supply terminals for connection to a supply to keep an intermediate junction between layers of the structure reverse biased, wherein the circuit includes at least one totally isolated diode (40, 45) in series with one of said terminals and oriented to be normally forward biased by the supply.
Claim 2
Dependent Claim
63 words
A monolithic integrated circuit having a parasitic-four layer structure of alternating polarity types (18-10-11-13), and supply terminals for connection to a supply to keep an intermediate junction between layers of the structure reverse biased, wherein the circuit includes at least one totally isolated diode (40, 45) in series with one of said terminals and oriented to be normally forward biased by the supply.
Claim 3
Dependent Claim
37 words
A monolithic integrated circuit as claimed in claim 1 wherein the totally isolated diode (40, 45) is a polysilicon diode formed on a surface of the integrated circuit substrate and insulated therefrom by an oxide layer (43).
Claim 4
Dependent Claim
31 words
-A monolithic integrated circuit as claimed in either claim 1 or claim 2 wherein a respective said totally isolated diode (40, 45) is provided in series with each of said terminals.
Claim 5
Dependent Claim
34 words
A monolithic integrated circuit as claimed in any of claims 1 to 3 wherein the parasitic four layer structure (18-10-11-13) is formed by junction isolation of one device in the integrated circuit from another.
Claim 6
Dependent Claim
104 words
A monolithic integrated circuit as claimed in claim 4 and comprising a substrate of a first polarity type (10), a well region of a second polarity type in the substrate (11), a first device formed in said well region (11) including a first further region of the first polarity type (13), a second device formed in the substrate outside the well region and including a second further region of the second polarity type (18), supply terminals to the substrate (10) and said well region (11) connectable to a supply to keep the junction between the well region (11) and the substrate (10) reverse biased.
Claim 7
Dependent Claim
40 words
A monolithic integrated circuit as claimed in claim 5 wherein said first and second polarity types are N and P types respectively and said first device is an N-channel CMOS FET and said second device is a P-channel CMOS FET.
Claim 8
Dependent Claim
14 words
A monolithic integrated circuit as claimed in claim 6 and constituting a CMOS inverter.
Claim 9
Dependent Claim
15 words
A monolithic integrated circuit as claimed in claim 6 and constituting a CMOS analogue switch.
References Cited (Backward Citations)
GB1542481A
Cited
WO1981002949A1
Cited
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