Patent EP0198258A2 successfully refreshed from Google Patents.
EP0198258A2
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Memory means with multiple word read and single word write
Assignee: Wang Laboratories Inc
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Filing: 1986-03-19
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Granted: —
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Expires: 2006-03-19
Abstract
Abstract A memory wherein the basic unit of information storage is a multiple of word size providing, in the read aspect, for reads of multiple information units in a single read operation and, in the write aspect, for writes of a single word. In the read aspect, the memory includes a memory unit having a memory storage means for storing units of information and a memory unit control means. Each read request includes an initial address and specifies a number of units of information. In the write aspect, the memory unit means includes a memory storage means including at least one memory plane means containing locations for storing units of information. Each unit of information comprises a plurality of words of information and each memory plane means comprises a corresponding plurality of sub-plane means containing storage locations for words, wherein each memory plane means location for storing a unit of 'information is comprised of a word storage location from each of the sub-plane means. Each write request includes a write address and a command specifying the number of words of information to be written.
Inventors
- 👤 David L. Whipple
- 👤 Edward D. Mann
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 11:26
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/04
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
187 words
1) In an information processing system (102), memory unit means (130) for storing information to be operated upon by the system, comprising: memory storage means (206, 208) for storing units of information, and memory unit control means (222, 230, 232, 234, 236) responsive to memory read requests for generating corresponding addresses of information unit storage locations in the memory storage means, the memory storage means (206, 208) responsive to the addresses for reading information units from the corresponding memory storage means locations, wherein each read request includes an initial address and specifies a number of units of information, and the memory unit control means (222, 230, 232, 234, 236) is responsive to a request specifying one or more units of information for generating in a single memory operation a sequence of addresses, the sequence of addresses beginning at the initial address and containing a number of addresses equal to the specified number of information units, and the memory storage means (206, 208) is responsive to the sequence of addresses for reading information units from the corresponding sequence of memory storage means locations in the single memory operation.
Claim 2
Dependent Claim
187 words
1) In an information processing system (102), memory unit means (130) for storing information to be operated upon by the system, comprising: memory storage means (206, 208) for storing units of information, and memory unit control means (222, 230, 232, 234, 236) responsive to memory read requests for generating corresponding addresses of information unit storage locations in the memory storage means, the memory storage means (206, 208) responsive to the addresses for reading information units from the corresponding memory storage means locations, wherein each read request includes an initial address and specifies a number of units of information, and the memory unit control means (222, 230, 232, 234, 236) is responsive to a request specifying one or more units of information for generating in a single memory operation a sequence of addresses, the sequence of addresses beginning at the initial address and containing a number of addresses equal to the specified number of information units, and the memory storage means (206, 208) is responsive to the sequence of addresses for reading information units from the corresponding sequence of memory storage means locations in the single memory operation.
Claim 3
Dependent Claim
40 words
2) The memory unit means (130) of claim 1, wherein: the memory storage means includes, first memory plane means (206) containing storage locations having successive even addresses, and second memory planes means (208) containing storage locations having successive odd addresses.
Claim 4
Dependent Claim
103 words
3) The memory unit means (130) of claim 2, further comprising: first output latch means (210) connected from the information output of the first memory plane means (206) for receiving and storing units of information read therefrom, second output latch means (212) connected from the information output of the second memory plane means (208) for receiving and storing units of information read therefrom, and memory unit output selector means (214) connected from the first and second latch means and responsive to a current address to select and read from an output latch means (210, 212) the information unit corresponding to the current address.
Claim 5
Dependent Claim
81 words
4) The memory unit means (130) of claim 3, wherein: the first and second memory plane means (206, 208) are responsive to each address provided thereto to read an information unit from the corresponding location in one of the memory plane means and into the corresponding output latch means (210, 212), and to concurrently read the information unit from the corresponding next location in the other of memory plane means (208, 206) and into the corresponding output latch means (212, 210).
Claim 6
Dependent Claim
98 words
5) The memory unit means (130) of claim 4, wherein: the memory unit control means (222, 230, 232, 234, 236) is responsive to each memory read request to provide the initial and each alternate successive address of a sequence of addresses to the first and second memory planes (206,208) to read corresponding pairs of information units therefrom, and to provide each successive address of a sequence of addresses to the memory output selector means (214) to select and read from the memory unit means the successive memory information units of a sequence of one or more information units.
Claim 7
Dependent Claim
21 words
6) The memory unit means (130) of claim 1, wherein: each unit of information is comprised of multiple words of information.
Claim 8
Dependent Claim
194 words
7) In an information processing system (102), memory unit means (130) for storing information to be operated upon by the system, comprising: memory storage means (206, 208) including at least one memory plane means (206, 208) containing locations for storing units of information, each unit of information comprising a plurality of words of information, and each memory plane means (206, 208) comprising a corresponding plurality of sub-plane means containing storage locations for words, wherein each memory plane means (206, 208) location for storing a unit of information is comprised of a word storage location from each of the sub-plane means, and memory unit control means (222, 230, 232, 234, 236) responsive to memory write requests for controlling the writing of information into the memory unit means (206, 208), wherein each write request includes a write address and a command specifying the number of words of information to be written, ― the memory unit control means (222, 230, 232, 234, 236) being responsive to a write request address for generating a memory plane address identifying the corresponding plurality of sub-plane word locations comprising the information unit storage location wherein information is to be written, and
Claim 9
Dependent Claim
194 words
7) In an information processing system (102), memory unit means (130) for storing information to be operated upon by the system, comprising: memory storage means (206, 208) including at least one memory plane means (206, 208) containing locations for storing units of information, each unit of information comprising a plurality of words of information, and each memory plane means (206, 208) comprising a corresponding plurality of sub-plane means containing storage locations for words, wherein each memory plane means (206, 208) location for storing a unit of information is comprised of a word storage location from each of the sub-plane means, and memory unit control means (222, 230, 232, 234, 236) responsive to memory write requests for controlling the writing of information into the memory unit means (206, 208), wherein each write request includes a write address and a command specifying the number of words of information to be written, ― the memory unit control means (222, 230, 232, 234, 236) being responsive to a write request address for generating a memory plane address identifying the corresponding plurality of sub-plane word locations comprising the information unit storage location wherein information is to be written, and
Claim 10
Dependent Claim
24 words
to the write request command for generating one or more write enable signals identifying the sub-plane means corresponding to the words to be written,
Claim 11
Dependent Claim
24 words
to the write request command for generating one or more write enable signals identifying the sub-plane means corresponding to the words to be written,
Claim 12
Dependent Claim
25 words
the sub-plane means being responsive to the memory plane address and to the enable signals to write the information into the corresponding word storage locations.
Claim 13
Dependent Claim
25 words
the sub-plane means being responsive to the memory plane address and to the enable signals to write the information into the corresponding word storage locations.
Claim 14
Dependent Claim
28 words
8) The memory unit means of claim 7, wherein: each write command may specify that either a single word or a unit of information is to be written.
References Cited (Backward Citations)
No citation records indexed.
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