Patent EP0197708A2 successfully refreshed from Google Patents.
EP0197708A2
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Digital zero IF circuit
Assignee: STC PLC
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Filing: 1986-03-26
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Granted: —
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Expires: 2006-03-26
Abstract
Abstract A digital zero IF circuit having first and second signal paths 111, 110 to which a radio frequency signal is applied, each path including a sampling and digitising means 121, 12Q and a digital filter means 13l, 13Q, the circuit including a clock generator arranged to generate two clock pulse trains in quadrature phase relationship, each sampling means being operated in response to a respective one of the clock pulse trains.
Inventors
- 👤 Andrew Chi-Chung Wong
- 👤 Robert Rolley
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 09:02
CPC Classifications
H; H03; H03D; H03D3/00; H03D3/007; H03B; H03B27/00; H03D2200/00; H03D2200/0041; H03D2200/005; H03D2200/0054; H03D3/006
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
92 words
A digital zero IF circuit having first and second signal paths (111, 11Q) to which a radio frequency signal is applied, characterised in that each path includes a sampling and digitising means (121, 12Q) and a digital filter means (13I, 13Q), the circuit including a clock generator arranged to generate two clock pulse trains in quadrature phase relationship, each sampling means being operated in response to a respective one of the clock pulse trains, each clock pulse train running at a frequency of 2f , where f is the r.f. carrier frequency..
Claim 2
Dependent Claim
92 words
A digital zero IF circuit having first and second signal paths (111, 11Q) to which a radio frequency signal is applied, characterised in that each path includes a sampling and digitising means (121, 12Q) and a digital filter means (13I, 13Q), the circuit including a clock generator arranged to generate two clock pulse trains in quadrature phase relationship, each sampling means being operated in response to a respective one of the clock pulse trains, each clock pulse train running at a frequency of 2f , where f is the r.f. carrier frequency..
Claim 3
Dependent Claim
50 words
A digitial zero IF circuit according to claim 1 characterised in that each digital filter means comprises a shift register (261, 26Q) into which the digitised signals are fed and a memory (271, 27Q) containing look-up tables, the contents of the shift register forming a parallel address for the memory.
Claim 4
Dependent Claim
31 words
A digital zero IF circuit according to claim 1 or 2 characterised in that each digitising means (201, 20Q) comprises in the simplest case of a 1-bit analogue to digital converter.
Claim 5
Dependent Claim
24 words
A digital zero IF circuit according to claim 1 or 2 characterised in that each digitising means (201, 20Q) comprises a zero crossing detector.
Claim 6
Dependent Claim
42 words
A digital zero IF circuit according to claim 1 or 2 characterised in that each digitising means comprises a number of zero-crossing detectors operating in parallel followed by an n bit to log e n bit encoder to obtain a multiple-bit output.
Claim 7
Independent Claim
81 words
A method of digitally processing a radio frequency signal including the steps of applying the signal to identical first and second signal paths and, in each signal path, sampling the signal, digitising the sampled signal and digitally filtering the digitised signal, the sampling of the signal in the two paths being effected under the control of respective clock pulse trains both of the same frequency 2f c but having a quadrature phase relationship, where f c is the r.f. carrier frequency.
Claim 8
Independent Claim
81 words
A method of digitally processing a radio frequency signal including the steps of applying the signal to identical first and second signal paths and, in each signal path, sampling the signal, digitising the sampled signal and digitally filtering the digitised signal, the sampling of the signal in the two paths being effected under the control of respective clock pulse trains both of the same frequency 2f c but having a quadrature phase relationship, where f c is the r.f. carrier frequency.
References Cited (Backward Citations)
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