Patent EP0197499A2 successfully refreshed from Google Patents.
EP0197499A2
Expired / Lapsed
EP
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Microcomputer system with independent operating systems
Assignee: Bull HN Information Systems Inc
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Filing: 1986-04-02
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Granted: —
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Expires: 2006-04-02
Abstract
Abstract 57 A computer system is described wherein two independent processors communicate via a bus system and operate substantially concurrently, each computer having its own operating system software and share a common memory. The architecture of the computer system is such that one of the processors is allocated the bulk of memory band-width with the other processor taking the remainder. Arbitration for memory allocation is accomplished via a combination of a new firmware instruction and a semaphore.
Inventors
- 👤 Thomas S. Hirsch
- 👤 James W. Stonier
- 👤 Thomas O. Holtey
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-25 04:57
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/16; G06F15/163; G06F15/167; G06F13/00; G06F13/14; G06F13/16; G06F13/1605; G06F13/1652; G06F13/1663
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
102 words
A computer system comprised of: (a) a bus; (b) a main memory having a predetermined band-width coupled to said bus; (c) a first and second processor coupled to said bus, said first processor operating. under a first operating system and said second processor operating under a second operating system, said first and second processors communicating with each other and with said main memory via said bus; (d) a semaphore for indicating to said second processor when said main memory is not being utilized by said first processor; and (e) firmware instruction means for monitoring said semaphore on behalf of said second processor.
Claim 2
Dependent Claim
102 words
A computer system comprised of: (a) a bus; (b) a main memory having a predetermined band-width coupled to said bus; (c) a first and second processor coupled to said bus, said first processor operating. under a first operating system and said second processor operating under a second operating system, said first and second processors communicating with each other and with said main memory via said bus; (d) a semaphore for indicating to said second processor when said main memory is not being utilized by said first processor; and (e) firmware instruction means for monitoring said semaphore on behalf of said second processor.
Claim 3
Dependent Claim
37 words
The computer system as recited in Claim 1 wherein said first processor is firmware driven and said second processor is software driven and wherein said second processor utilizes at least eighty percent of the available memory band-width.
Claim 4
Dependent Claim
51 words
The computer system as recited in Claim 2 including a third processor coupled to said bus and operating under a third operating system, said third processor also operating substantially concurrently and independently of said first and second processor, said third processor dedicated for performing input/output (I/O) operations for the computer system.
Claim 5
Dependent Claim
32 words
The computer system as recited in Claim 5 including first means for storing information indicating to said firmware instruction means the amount of time it has between successive monitoring of the semaphore.
Claim 6
Dependent Claim
31 words
The computer system as recited in Claim 4 including second means for storing said information indicating the number of times said semaphore is to be monitored in any given monitoring period.
Claim 7
Dependent Claim
63 words
A computer system comprised of: (a) a bus; (b) a main memory having a predetermined band-width coupled to said bus; (c) a plurality of processors coupled to said bus and communicating with said main memory via said bus, each of said plurality of processors operating under its own operating system, and wherein one of said processors utilizes eighty percent of the memory band-width.
Claim 8
Dependent Claim
63 words
A computer system comprised of: (a) a bus; (b) a main memory having a predetermined band-width coupled to said bus; (c) a plurality of processors coupled to said bus and communicating with said main memory via said bus, each of said plurality of processors operating under its own operating system, and wherein one of said processors utilizes eighty percent of the memory band-width.
Claim 9
Dependent Claim
21 words
The computer system as recited in Claim 6 including mailbox means for storing information indicating the availability of said main memory.
Claim 10
Dependent Claim
21 words
The computer system as recited in Claim 7 including firmware instruction means for sampling the . information in said mailbox means.
Claim 11
Dependent Claim
28 words
The computer system as recited in Claim 8 . including first means for storing information indicating the amount of time between successive sampling by said firmware instruction means.
Claim 12
Dependent Claim
36 words
The computer system as recited in Claim 9 including second means for storing information indicating the number of ' samples to be made of the mailbox by said firmware instruction means before attending to other matters.
Claim 13
Dependent Claim
19 words
The computer system as recited in Claim 10 including third means for storing the address of the mailbox means.
References Cited (Backward Citations)
No citation records indexed.
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