Patent EP0192875A2 successfully refreshed from Google Patents.
EP0192875A2
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EP
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Bidirectional amplifier
Assignee: Xilinx Inc
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Filing: 1985-09-25
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Granted: —
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Expires: 2005-09-25
Abstract
Abstract Bidirectional amplifier employs a single buffer amplifier (64). The bidirectional amplifier is programmed by applying a control signal (01 and its complementary signal (Q), which establishes the state of four pass transistors (P'<sub>1</sub>, P'<sub>2</sub>,P'<sub>3</sub>. P'<sub>4</sub>) or four CMOS transmission gates (T<sub>1</sub>, T<sub>2</sub>, T<sub>3</sub>, T<sub>4</sub>). For a first selection of the control signal, the bidirectional amplifier receives an input signal on a first lead (A') and produces an amplified signal on a second lead (B'). For a second selection of the control signal, the amplifier receives an input signal on the second lead (B') and produces an amplified output signal on the first lead (A').
Inventors
- 👤 William S. Carter
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 08:25
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/02; H03K5/026
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
93 words
A bidirectional amplifier comprising: an amplifier having an input lead and an output lead, an input signal on the input lead generating an output signal from the amplifier on the output lead; means for selectively passing a first input signal on a first terminal to the input lead and for passing the output signal on the output lead to a second terminal; and means for selectively passing a second input signal on the second terminal to the input lead and for passing the output signal on the output lead to the first terminal.
Claim 2
Dependent Claim
93 words
A bidirectional amplifier comprising: an amplifier having an input lead and an output lead, an input signal on the input lead generating an output signal from the amplifier on the output lead; means for selectively passing a first input signal on a first terminal to the input lead and for passing the output signal on the output lead to a second terminal; and means for selectively passing a second input signal on the second terminal to the input lead and for passing the output signal on the output lead to the first terminal.
Claim 3
Dependent Claim
78 words
An amplifier as claimed in claim 1 wherein the means for selectively passing the signals comprises: first means for controlling the passage of the first input signal on the first terminal to the input lead; second means for controlling the passage of a second input signal on the second terminal to the input lead; and third and fourth means for controlling the passage of the output signal on the output lead to the first and second terminals, respectively.
Claim 4
Dependent Claim
194 words
A bidirectional amplifier comprising: an amplifier having an input lead and an output lead; first means for controlling the passage of a first input signal from a first lead to the input lead; second means for controlling the passage of a second input signal from a second lead to the input lead; third means for controlling the passage of an output signal of the amplifier from the output lead to the first lead; fourth means for controlling the passage of the output signal from the output lead to the second lead; and means for selectively programming the first, second, third and fourth means such that for a first program selection the first and fourth means permit the passage of the first input signal and the output signal respectively, and the second and third means do not permit the passage of the second input signal and the output signal, respectively, and for a second program selection the second and third means permit the passage of the second input signal and the output signal respectively, and the first and fourth means do not permit the passage of the first input signal and the output signal respectively.
Claim 5
Dependent Claim
194 words
A bidirectional amplifier comprising: an amplifier having an input lead and an output lead; first means for controlling the passage of a first input signal from a first lead to the input lead; second means for controlling the passage of a second input signal from a second lead to the input lead; third means for controlling the passage of an output signal of the amplifier from the output lead to the first lead; fourth means for controlling the passage of the output signal from the output lead to the second lead; and means for selectively programming the first, second, third and fourth means such that for a first program selection the first and fourth means permit the passage of the first input signal and the output signal respectively, and the second and third means do not permit the passage of the second input signal and the output signal, respectively, and for a second program selection the second and third means permit the passage of the second input signal and the output signal respectively, and the first and fourth means do not permit the passage of the first input signal and the output signal respectively.
Claim 6
Dependent Claim
24 words
An amplifier as claimed in claim 2 or 3 wherein each of the first, second, third, and fourth means ccmprises a CMOS transmission gate.
Claim 7
Dependent Claim
23 words
An amplifier as claimed in claim 2 or 3 wherein each of the first, second, third and fourth means comprises a pass transistor.
Claim 8
Dependent Claim
26 words
An amplifier as claimed in claim 5 wherein each pass transistor is an N channel enhancement mode transistor having a gate, a source, and a drain.
Claim 9
Dependent Claim
26 words
An amplifier as claimed in claim 5 wherein each pass transistor is a P channel enhancement mode transistor having a gate, a source, and a drain.
Claim 10
Dependent Claim
46 words
An amplifier as claimed in claim 6 or 7 wherein the means for selectively programming provides an output signal Q supplied to the gates of the first ar . fourth means and an output signal Q supplied to the cates of the second and third means.
Claim 11
Dependent Claim
34 words
An amplifier as claimed in any one of claims 1-7 wherein the means for selectably programming comprises a storage element having a signal Q and the and the complement thereof Q as output signals.
Claim 12
Dependent Claim
14 words
An amplifier as claimed in claim 9 wherein the storage element is a latch.
References Cited (Backward Citations)
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