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EP0191476A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Composite semiconductor device and process for manufacturing the same

Assignee: Toshiba Corp
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Filing: 1986-02-12
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Granted: —
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Expires: 2006-02-12
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Abstract

Abstract Disclosed is a composite semiconductor device (1), comprising a composite substrate consisting of first and second semiconductor substrates (1a, 1b), one surface of each of which is mirror-polished, so that the mirror-polished surfaces are bonded together. The first semiconductor substrate (1a) has a space (11) adjacent to the bonding interface, and an annular groove (12) which communicates with the space (11) from a surface of the first semiconductor substrate (1a) opposite the bonding interface, the annular groove (12) being formed in a portion of the first semiconductor substrate (1a) corresponding to a peripheral edge portion of the space (11) thereof, at least one pillar (5) projecting through the space (11) to the bonding interface from a surface, which is exposed to the space (11), of a first por. tion (4) of the first semiconductor substrate (1a) which is defined by the space (11) and the annular groove (12), a first insulating layer (7), formed in the annular groove (12), for electrically isolating the first portion (4) from a second portion of the first semiconductor substrate (1a) adjacent thereto, a second insulating layer (10), formed on the pillar (5) or a bonding interface between the pillar (5) and the second semiconductor substrate (1b), for electrically isolating the first portion (4) from the second semiconductor substrate (1b), a first functional element (6) formed in the first portion (4), and a second functional element (2) formed in the second portion.

Inventors

  • 👤 Yutaka Koshino
  • 👤 Tatsuo Akiyama
  • 👤 Yoshiro Baba

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 21:49
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0107; H10D84/0109; H10D84/0112; H10D84/02; H10D84/03; H10D84/038; H10D84/40; H10D84/401; H10D84/403; H10D84/406; H10D84/60; H10D84/641; H10D84/642; H10P; H10P10/00; H10P10/12; H10P10/128; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/019; H10W10/021; H10W10/061; H10W10/10; H10W10/181; H10W10/20; H10W10/041; H10W10/40

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 231 words
A composite semiconductor device, comprising: a composite substrate (1) consisting of first and second semiconductor substrates (la, lb), one surface of each of which is mirror-polished, so that said mirror-polished surfaces are bonded together, said first semiconductor substrate (la) having a space (11) adjacent to the bonding interface, and an annular groove (12) which communicates with said space from a surface of said first semiconductor substrate la opposite the bonding interface, said annular groove (12) being formed in a portion of said first semiconductor substrate (la) corresponding to a peripheral edge portion of said space (11) thereof; at least one pillar (5) projecting through said space (11) to the bonding interface from a surface, which is exposed to said space (11), of a first portion (4) of said first semiconductor substrate (la) which is defined by said space and said annular groove; a first insulating layer (7), formed in said annular groove (12), for electrically isolating said first portion (4) from a second portion of said first semiconductor substrate (la) adjacent thereto; a second insulating layer (10), formed on said pillar (5) or a bonding interface between said pillar (5) and said second semiconductor substrate (lb), for electrically isolating said first portion (4) from said second semiconductor substrate (lb); a first functional element (6) formed in said first portion (4); and a second functional element (2) formed in said second portion.
Claim 2
Dependent Claim 231 words
A composite semiconductor device, comprising: a composite substrate (1) consisting of first and second semiconductor substrates (la, lb), one surface of each of which is mirror-polished, so that said mirror-polished surfaces are bonded together, said first semiconductor substrate (la) having a space (11) adjacent to the bonding interface, and an annular groove (12) which communicates with said space from a surface of said first semiconductor substrate la opposite the bonding interface, said annular groove (12) being formed in a portion of said first semiconductor substrate (la) corresponding to a peripheral edge portion of said space (11) thereof; at least one pillar (5) projecting through said space (11) to the bonding interface from a surface, which is exposed to said space (11), of a first portion (4) of said first semiconductor substrate (la) which is defined by said space and said annular groove; a first insulating layer (7), formed in said annular groove (12), for electrically isolating said first portion (4) from a second portion of said first semiconductor substrate (la) adjacent thereto; a second insulating layer (10), formed on said pillar (5) or a bonding interface between said pillar (5) and said second semiconductor substrate (lb), for electrically isolating said first portion (4) from said second semiconductor substrate (lb); a first functional element (6) formed in said first portion (4); and a second functional element (2) formed in said second portion.
Claim 3
Dependent Claim 27 words
A device according to claim 1, characterized in that said annular groove (12) is filled with a filling material (8) formed on said first insulating layer (7).
Claim 4
Dependent Claim 43 words
A device according to claim 2, characterized in that an insulating layer is formed on the surface of said composite semiconductor substrate, which is exposed to said annular groove (12) and said space (11), and said filling material layer (8) is formed thereon.
Claim 5
Dependent Claim 32 words
A device according to claim 2, characterized in that said filling material comprises an element selected from the group consisting of Si0 2 , Si 3 N 4 , and polycrystalline Si.
Claim 6
Dependent Claim 39 words
A device according to claim 1, characterized in that said pillar (5) is tapered toward said bonding interface, and said second insulating layer (10) is formed around a portion of said pillar (5), which has a minimal cross-sectional area.
Claim 7
Dependent Claim 33 words
A device according to claim 1, characterized in that said second functional element (2) is a power element, and said first functional element (6) is an integrated circuit for controlling said power element.
Claim 8
Dependent Claim 258 words
A process for manufacturing a composite semiconductor device comprising the steps of: mirror-polishing one surface of a first semiconductor substrate (la); mirror-polishing one surface of a second semiconductor substrate (lb); selectively etching said mirror-polished surface of said first semiconductor substrate (la) so as to form a recess (lla) and in said recess at least one pillar (5) projecting from a bottom portion of said recess (lla) to said mirror-polished surface; heating said first and second semiconductor substrates (la, lb) after said mirror-polished surfaces thereof have been placed in contact with each other so as to bond them together, thereby forming a composite substrate (1) in which a space (11) including at least one pillar (5) is formed; etching a portion of said first semiconductor substrate (la) corresponding to a peripheral edge portion of said space (11) thereof so as to form an annular groove (12) extending to said space (11) and forming a first portion (4) which is defined by said annular groove (12) and said space (11) and is supported by said pillar (5); performing thermal oxidation so as to form an oxide film on a surface, which is exposed to said annular groove (12) and said space (11), of said composite substrate (1), whereby said first portion (4) is electrically isolated from a second portion of said first semiconductor substrate (la) and from said second semiconductor substrate (lb), both of which are adjacent thereto; forming a first functional element (6) in said first portion (la); and forming a second functional element (2) in said second portion.
Claim 9
Dependent Claim 258 words
A process for manufacturing a composite semiconductor device comprising the steps of: mirror-polishing one surface of a first semiconductor substrate (la); mirror-polishing one surface of a second semiconductor substrate (lb); selectively etching said mirror-polished surface of said first semiconductor substrate (la) so as to form a recess (lla) and in said recess at least one pillar (5) projecting from a bottom portion of said recess (lla) to said mirror-polished surface; heating said first and second semiconductor substrates (la, lb) after said mirror-polished surfaces thereof have been placed in contact with each other so as to bond them together, thereby forming a composite substrate (1) in which a space (11) including at least one pillar (5) is formed; etching a portion of said first semiconductor substrate (la) corresponding to a peripheral edge portion of said space (11) thereof so as to form an annular groove (12) extending to said space (11) and forming a first portion (4) which is defined by said annular groove (12) and said space (11) and is supported by said pillar (5); performing thermal oxidation so as to form an oxide film on a surface, which is exposed to said annular groove (12) and said space (11), of said composite substrate (1), whereby said first portion (4) is electrically isolated from a second portion of said first semiconductor substrate (la) and from said second semiconductor substrate (lb), both of which are adjacent thereto; forming a first functional element (6) in said first portion (la); and forming a second functional element (2) in said second portion.
Claim 10
Dependent Claim 33 words
A process according to claim 7, further comprising the step of annealing said first and second semiconductor substrates (la, lb) after said mirror-polished surfaces thereof have been placed in contact with each other.
Claim 11
Dependent Claim 20 words
A process according to claim 7, characterized in that the heating temperature falls within the range of 1,000 to 1,200°C.
Claim 12
Dependent Claim 37 words
A process according to claim 7, further comprising the step of ion-implanting an impurity, having the same conductivity type as said first semiconductor substrate (la), in an inner surface of said recess after the selective etching step.
Claim 13
Dependent Claim 31 words
A process according to claim 7, further comprising the step of reducing the thickness of at least one of said first and second semiconductor substrates (la, lb) after the bonding step.
Claim 14
Dependent Claim 43 words
A process according to claim 7, further comprising the step of depositing a filling material (8) on the surface of said oxide film (7, 10) so as to fill said annular groove (12) with said filling material (8) after the thermal oxidation step.
Claim 15
Dependent Claim 32 words
A process according to claim 12, characterized in that said filling material is an element selected from the group consisting of SiO 2 , Si 3 N 4 , and polycrystalline Si.
Claim 16
Dependent Claim 22 words
A process according to claim 7, characterized in that the surface roughness of the mirror-polished surface is not more than 500 Å.

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