Method for optimizing operand access and processing in a computer system

Claim 3

A method according to claim 1 wherein sequentially accessed intermediate code instructions are processed as follows: determining if an instruction is a label, if so obtaining the next instruction, if not, determining if it is a load instruction, if not, obtaining the next instruction, if so, determining first if it and the following instructions corresponds to a first pattern of a load operation followed by a register operation followed by a store operation all involving the same objacts, if so, replacing the store operation by the RS form of the operation and deleting the load operation and the register operation and accessing the next instruction, if the operation sequence did not follow the pattern, determining second if the following instructions correspond to a second pattern of a load operation followed by a register operation, if so, replacing the register operation by its SR form and deleting the load operation, and if the operation sequence did not follow this pattern, determining third if the following instructions correspond to a third pattern of a load operation followed by a store operation, if so, replacing the store instruction by an SS move instruction and deleting the load instruction and obtaining the next instruction, if none of the three patterns specified are present, obtaining the next instruction in the sequence.

Claim 4

A method according to claim 2 wherein an additional test is made for all three patterns whereby the replacement procedure is modified to retain any operand or result in a register if it is determined that it will be used again in the instruction sequence.

Claim 5

4 . A method according to claim 2 wherein, before the specified program alterations are made responsive to a successful search for the first pattern, including the further stop of,

Claim 6

determining if the following criteria are met (a) no stores nor subroutine calls between the load operation and store operation, (b) no sets of corresponding index- or base- registers between the load operation and store operation, (c) no use of a first register operand (r1) between the load operation and store operation, including index and base registars in the store operation itself, (d) no sets of a second register operand (r2) between the register operation and store operation, (e) r1 is last used at the store operation, and (f) register operation has an equivalent RS format instruction ("op rs,") and, proceeding to the next step in the sequence if not all of the above criteria are met.

Claim 7

determining if the following criteria are met (a) no stores nor subroutine calls between the load operation and store operation, (b) no sets of corresponding index- or base- registers between the load operation and store operation, (c) no use of a first register operand (r1) between the load operation and store operation, including index and base registars in the store operation itself, (d) no sets of a second register operand (r2) between the register operation and store operation, (e) r1 is last used at the store operation, and (f) register operation has an equivalent RS format instruction ("op rs,") and, proceeding to the next step in the sequence if not all of the above criteria are met.

Claim 8

A method according to claim 2 wherein, before the specified program alterations are made responsive to a successful search for the second pattern, including the further step of, determining if the following criteria are met: (a) no stores nor subroutine calls between the load operation and register operation, (b) no sets of corresponding index or base registers between the load operation and register operation, (c) no use of a register operand r1 between the load operation and register operation, (d) r1 is last used at the register operation, and (e) the register operation has an equivalent SR format instruction ("op_sr,'') and, proceeding to the next step in the sequence if not all of the above criteria are met

Claim 9

A method according to claim 2 wherein, before the specified program alterations are made responsive to a successful search for the third pattern, including the further step of, determining if the following criteria are met (a) no stores nor subroutine calls between the load operation and store operation, (b) no sets of corresponding index or base registers between the load operation and store operation, (c) no use of a register operand (r1) between the load operation and store operation, (d) r1 is last used at the store operation, and (e) the load/store pair has an equivalent storage-to-storage move instruction that is preferable to the load/-store pair, and obtaining the next instruction in the sequence if not all of the above criteria are met.

Claim 10

A method according to claim 1 wherein real registers are assigned to each instruction by replacing each symbolic register with a real machine register, and spill code is generated where necessary said predetermined patterns are located in the code produced by the previous step and these patterns are replaced with a different pattern of SR, RS or SS instructions if said predetermined patterns exist and, a machine code is generated from the intermediate code produced by said previous step.