Power on/off reset generator

Claim 2

A power on/off reset generator for monitoring a power supply (10) for a controlled logic system, characterized by: - voltage sensor means (20) connected in parallel with the power supply for producing an output signal when the voltage of the power supply (10) rises above a preselected value; - time delay means (30) connected to receive the output signal from the voltage sensor means (20) for producing a delay signal of a preselected duration; - trigger circuit means (40) connected to the time delay means (30) and responsive to the termination of the delay signal for producing a bounce-free enabling logic level reset signal, the trigger circuit (40) producing a disabling logic level signal when the power supply voltage is less than the preselected value; and - output driver means (50) associated with the trigger circuit (40) for furnishing the enabling signal and the disabling signal in a power failsafe manner to the controlled logic system.

Claim 3

A power on/off reset generator as claimed in claim 1, wherein the voltage sensor means (20) includes: - a temperature compensated precision-voltage zener diode (25) having one terminal thereof connected to the power supply (10), and - a first differential amplifier having a first input connected to a preselected reference voltage and a second input connected to the other terminal of the zener diode (25), the first differential amplifier producing the output signal, whereby the zener diode is selected to conduct when the power supply voltage is equal to or greater than a desired threshold voltage (E T ).

Claim 4

A power on/off reset generator as claimed in claim 2, wherein the time delay means (30) includes: - a delay capacitor (31), - a discharge transistor (32) connected in parallel with the capacitor (31), the transistor controlled by the output signal from the first differential amplifier to remove a charge from the capacitor (31), and - a charging resistor (33) connected to the power supply (10) and to the capacitor (31) for charging the capacitor.

Claim 5

A power on/off reset generator as claimed in claim 1, wherein the output driver means (50) include a driver transistor (51).

Claim 6

A power on/off reset generator as claimed in claim 1, wherein the trigger circuit means (40) includes a Schmitt Trigger.

Claim 7

A power on/off reset generator as claimed in claim 5, wherein the Schmitt trigger includes: - a second differential amplifier (41,42) having a first input connected to the capacitor (31), a second input connected to a source of reference voltage, and an output connected to the input of the driver transistor (51), - a feedback connection from the output of the driver transistor (51) to the first input of the second differential amplifier.

Claim 8

A power on/off reset generator as claimed in claim 1, in which the reset generator is powered by the power supply (10) being monitored, the generator maintaining active control of the controlled logic system under marginal power supply conditions within the range of 1.0. volt to 0.7 volts, characterised by a circuit which utilizes current paths through only one base-emitter voltage drop before re-establishing saturation, whereby the voltage sensor means (20), time delay means (30), trigger circuit means (40), and output driver means (50) individually and collectively perform properly under such marginal power supply conditions.

Claim 9

A power on/off reset generator as claimed in claim 1, wherein the voltage sensor means (20), the trigger circuit means (40) and the output driver means (50) are implemented with resistor and transistor elements whereby the generator (5) can be implemented as a single monolithic integrated circuit package.

Claim 10

A power on/off reset generator for monitoring a power supply and controlling a logic system to be enabled when the power supply voltage is greater than the threshold voltage (E T ) and to be disabled when the power supply voltage is less than the threshold voltage (E T ) characterized by: - a first differential amplifier powered by the power supply (10)and having a first input connected to a reference voltage divider (21,22) across the power supply the voltage divider (21,22) having a resistor R l and a resistor R 2 whereby a reference voltage equal to R 1 / R 1 +R 2 times the power supply voltage is produced, a second input, and an output, - a temperature compensated precision-voltage zener diode (25) connected from the second input of the first differential amplifier to the power supply whereby the first differential amplifier produces an output signal when the power supply voltage is equal to or greater than the breakdown voltage of the zener diode (25) divided by ( 1 - R 1 / RI+R2) - a time delay capacitor (31) connected to the power supply via a charging resistor (33), - a discharge transistor (32) having an output connected in parallel with the capacitor (31) and an input connected to the output of the first differential amplifier; - a second differential amplifier (41,42) having a first input thereof connected to the capacitor (31), a second input connected to the first input of the first differential amplifier, and an output thereof, and - a driver transistor (51) having an input connected to the output of the second differential amplifier (41,42) and an output (52) connected to the logic system, the output (52) also connected in positive feedback relationship to the first input of the second differential amplifier (41,42), whereby the driver transistor (51) produces an active-LOW output when the power supply voltage is less than the threshold voltage (E T ) and a HIGH output when the power supply is equal to or greater than the threshold voltage (E T ) .

Claim 11

A power on/off reset generator for monitoring a power supply and controlling a logic system to be enabled when the power supply voltage is greater than the threshold voltage (E T ) and to be disabled when the power supply voltage is less than the threshold voltage (E T ) characterized by: - a first differential amplifier powered by the power supply (10)and having a first input connected to a reference voltage divider (21,22) across the power supply the voltage divider (21,22) having a resistor R l and a resistor R 2 whereby a reference voltage equal to R 1 / R 1 +R 2 times the power supply voltage is produced, a second input, and an output, - a temperature compensated precision-voltage zener diode (25) connected from the second input of the first differential amplifier to the power supply whereby the first differential amplifier produces an output signal when the power supply voltage is equal to or greater than the breakdown voltage of the zener diode (25) divided by ( 1 - R 1 / RI+R2) - a time delay capacitor (31) connected to the power supply via a charging resistor (33), - a discharge transistor (32) having an output connected in parallel with the capacitor (31) and an input connected to the output of the first differential amplifier; - a second differential amplifier (41,42) having a first input thereof connected to the capacitor (31), a second input connected to the first input of the first differential amplifier, and an output thereof, and - a driver transistor (51) having an input connected to the output of the second differential amplifier (41,42) and an output (52) connected to the logic system, the output (52) also connected in positive feedback relationship to the first input of the second differential amplifier (41,42), whereby the driver transistor (51) produces an active-LOW output when the power supply voltage is less than the threshold voltage (E T ) and a HIGH output when the power supply is equal to or greater than the threshold voltage (E T ) .

Claim 12

A power on/off reset generator as claimed in claim 9 wherein the first differential amplifier (23,24), the second differential amplifier (41,42) and the driver transistor (51) are direct coupled, thereby adapting the reset generator to be insensitive to the rise and fall times of the power supply (10), and the positive feedback from the output of the driver transister (51) is connected to the first input of the second differential amplifier (41,42) whereby the transition between the active-LOW output and the HIGH output is non-oscillatory.