Integrated optical and electric circuit device

Claim 2

An integrated optical and electric circuit device comprising: a semiconductor integrated circuit substrate (1) in which a plurality of circuit units (2) are integrated near a major surface of said substrate, said substrate having a property to allow light to pass therethrough and said circuit units being arranged to receive a common signal; at least one semiconductor light emitting device (3, 10) formed in said semiconductor integrated circuit substrate, said light emitting device being activated by a common signal source (28) to emit light which passes through said semiconductor substrate; and semiconductor light detecting devices (17, 17a) coupled to said circuit units and formed in said semiconductor integrated circuit substrate, each of said light detecting devices being responsive to the light emitted from said semiconductor light emitting device to bring a corresponding circuit unit into a common signal receiving state.

Claim 3

A circuit device according to claim 1, characterized in that each of said circuit units (2) is a logic circuit and said common signal is a clock signal to drive said logic circuit.

Claim 4

A circuit device according to claim 1, characterized in that said logic circuit includes a transistor (19) having a control electrode connected to receive a clock signal, and said semiconductor light detecting device (17, 17a) is connected between said control electrode of said transistor and a constant potential source.

Claim 5

A circuit device according to claim 1, characterized in that said semiconductor light emitting device (10) is a light emitting diode.

Claim 6

A circuit device according to claim 1, characterized in that said semiconductor light detecting device is a photo diode (17) of a PIN structure.

Claim 7

A circuit device according to claim 1, characterized in that said semiconductor light detecting device is a photo conductor (17a).

Claim 8

A circuit device according to claim 1, characterized in that said semiconductor integrated circuit substrate is formed of gallium arsenide.

Claim 9

An integrated optical and electric circuit device comprising: an integrated circuit substrate (11) having a first conductivity type and formed of a first semiconductor material; a semiconductor light emitting diode (10) formed on said integrated circuit substrate, said semiconductor light emitting diode having an active layer (13) having said first conductivity type and formed of a first or second semiconductor material, a first cladding layer (12) formed between said active layer and said semiconductor circuit substrate, said first cladding layer having said first conductivity type and formed of said second semiconductor material, and a second cladding layer (14) formed on said active layer, said second cladding layer having said second conductivity type and formed of said second semiconductor material; an upper layer (16) formed of said first semiconductor material of an intrinsic type and formed on said second cladding layer; a plurality of field effect transistors (19) formed in said upper layer, each of said transistors having a source region (20), a drain region (21) and a gate electrode (25) which is formed on said upper layer; a region (18) of said first conductivity type formed in said upper layer and coupled to said gate electrode of one of said field effect transistors; and first and second electrodes (26, 27) coupled to said integrated circuit substrate (11) and said second cladding layer (14), respectively.

Claim 10

An integrated optical and electric circuit device comprising: an integrated circuit substrate (11) having a first conductivity type and formed of a first semiconductor material; a semiconductor light emitting diode (10) formed on said integrated circuit substrate, said semiconductor light emitting diode having an active layer (13) having said first conductivity type and formed of a first or second semiconductor material, a first cladding layer (12) formed between said active layer and said semiconductor circuit substrate, said first cladding layer having said first conductivity type and formed of said second semiconductor material, and a second cladding layer (14) formed on said active layer, said second cladding layer having said second conductivity type and formed of said second semiconductor material; an upper layer (16) formed of said first semiconductor material of an intrinsic type and formed on said second cladding layer; a plurality of field effect transistors (19) formed in said upper layer, each of said transistors having a source region (20), a drain region (21) and a gate electrode (25) which is formed on said upper layer; a region (18) of said first conductivity type formed in said upper layer and coupled to said gate electrode of one of said field effect transistors; and first and second electrodes (26, 27) coupled to said integrated circuit substrate (11) and said second cladding layer (14), respectively.

Claim 11

A circuit device according to claim 8, characterized in that said first conductivity type region (18) is formed deeper than said source region (20) and drain region (21) of said field effect transistor in said upper layer (16).

Claim 12

An integrated optical and electric circuit device comprising: an integrated circuit substrate (11) having a first conductivity type and formed of a first semiconductor material; a semiconductor light emitting diode (10) formed on said integrated circuit substrate, said semiconductor light emitting diode having an active layer (13) having said first conductivity type and formed of a first or second semiconductor material, a first cladding layer (12) formed between said active layer and said semiconductor circuit substrate, said first cladding layer having said first conductivity type and formed of a second semiconductor material, and a second cladding layer (14) formed on said active layer, said second cladding layer having a second conductivity type and formed of said second semiconductor material; first and second upper layers (16a, 16b) formed on said second cladding layer and formed of said first and second semiconductor materials of an intrinsic type, respectively, said second upper layer being formed between said first upper layer and said second cladding layer; a plurality of field effect transistors (19) formed in said first upper layer, each of said transistors having a source region (20), a drain region (21) and a gate electrode (25) formed on said first upper layer (16a); photo conductor means (17a) formed on said first upper layer, said photo conductor means having first and second electrodes (31, 32) formed apart on said first upper layer, and said first electrode being coupled to said gate electrode (25) of said field effect transistor; and electrodes (26, 27) coupled to said integrated circuit substrate and said second cladding layer, respectively.

Claim 13

An integrated optical and electric circuit device comprising: an integrated circuit substrate (11) having a first conductivity type and formed of a first semiconductor material; a semiconductor light emitting diode (10) formed on said integrated circuit substrate, said semiconductor light emitting diode having an active layer (13) having said first conductivity type and formed of a first or second semiconductor material, a first cladding layer (12) formed between said active layer and said semiconductor circuit substrate, said first cladding layer having said first conductivity type and formed of a second semiconductor material, and a second cladding layer (14) formed on said active layer, said second cladding layer having a second conductivity type and formed of said second semiconductor material; first and second upper layers (16a, 16b) formed on said second cladding layer and formed of said first and second semiconductor materials of an intrinsic type, respectively, said second upper layer being formed between said first upper layer and said second cladding layer; a plurality of field effect transistors (19) formed in said first upper layer, each of said transistors having a source region (20), a drain region (21) and a gate electrode (25) formed on said first upper layer (16a); photo conductor means (17a) formed on said first upper layer, said photo conductor means having first and second electrodes (31, 32) formed apart on said first upper layer, and said first electrode being coupled to said gate electrode (25) of said field effect transistor; and electrodes (26, 27) coupled to said integrated circuit substrate and said second cladding layer, respectively.

Claim 14

A circuit device according to claim 12, characterized in that said photo conductor means (17a) has a concave portion (30) formed in said first upper layer in which said source and drain regions of said transistor are formed, and said first and second electrodes are formed along said concave portion.

Claim 15

A circuit device according to claim 13, characterized in that said concave portion (30) is formed in said first upper layer (16a) deeper than said source region (20) and said drain region (21).

Claim 16

A circuit device according to claim 8 or 10, characterized in that said first semiconductor material is formed of gallium arsenide and said second semiconductor material is formed of gallium aluminum arsenide.

Claim 17

A circuit device according to claim 8 or 10, characterized in that a confinement layer (15) having a confining area (15a) is formed in said second cladding layer.