Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
234 words
A bipolar transistor comprising: a semiconductor body (10, 12, 18); a multi-conductive layer which includes a non-monocrystalline silicon film (20) formed on said semiconductor body (10, 12, 18) and a metal silicide film (22) formed on said non-monocrystalline silicon film (20); an insulation layer (28, 38) formed on said non-monocrystalline film (20); a collector region (16) of a first conductivity type formed in the surface area of said semiconductor body (10, 12, 18); a base region of a second conductivity type which includes both a first region (30) formed in the surface area of said collector region (16) by using said non-monocrystalline silicon film (20) as a diffusion source of impurities, and a second region (36) formed in the surface area of said collector region (1.6) and in contact with said first region (30); and an emitter region (42) of the first conductivity type formed in the surface area of said second region (36), characterized in that, said metal silicide film (22) is formed on the entire upper surface of said non-monocrystalline silicon film (20) and patterned, together with said non-monocrystalline silicon, to form an opening, said insulation layer (28, 38) is formed on the end surfaces of said non-monocrystalline silicon and metal silicide film (20, 22) which define said opening, and said emitter region (42) is formed by using said insulation layer (28, 38) and said multi-conductive layer (20, 22) as a mask.
Claim 2
Dependent Claim
234 words
A bipolar transistor comprising: a semiconductor body (10, 12, 18); a multi-conductive layer which includes a non-monocrystalline silicon film (20) formed on said semiconductor body (10, 12, 18) and a metal silicide film (22) formed on said non-monocrystalline silicon film (20); an insulation layer (28, 38) formed on said non-monocrystalline film (20); a collector region (16) of a first conductivity type formed in the surface area of said semiconductor body (10, 12, 18); a base region of a second conductivity type which includes both a first region (30) formed in the surface area of said collector region (16) by using said non-monocrystalline silicon film (20) as a diffusion source of impurities, and a second region (36) formed in the surface area of said collector region (1.6) and in contact with said first region (30); and an emitter region (42) of the first conductivity type formed in the surface area of said second region (36), characterized in that, said metal silicide film (22) is formed on the entire upper surface of said non-monocrystalline silicon film (20) and patterned, together with said non-monocrystalline silicon, to form an opening, said insulation layer (28, 38) is formed on the end surfaces of said non-monocrystalline silicon and metal silicide film (20, 22) which define said opening, and said emitter region (42) is formed by using said insulation layer (28, 38) and said multi-conductive layer (20, 22) as a mask.
Claim 3
Dependent Claim
42 words
A bipolar transistor according to claim 1, characterized in that said semiconductor body includes a silicon substrate (10) of the second conductivity type and a connecting region (12, 18) of the first conductivity type formed in contact with said collector region (16).
Claim 4
Dependent Claim
22 words
A bipolar transistor according to claim 1, characterized in that said metal silicide film (22) is formed of a molybdenum silicide (MoSi2).
Claim 5
Dependent Claim
24 words
A bipolar transistor according to claim 1, characterized in that said metal silicide film (22) is formed of a titanium silicide (TiSi 2 ).
Claim 6
Dependent Claim
24 words
A bipolar transistor according to claim 1, characterized in that said metal silicide film (22) is formed of a tungsten silicide (WSi 2 ).
Claim 7
Independent Claim
266 words
A method for producing a bipolar transistor comprising: a first step of forming a collector region (16) of a first conductivity type in the surface area of a semiconductor body (10, 12, 18); a second step of forming a non-monocrystalline silicon film (20) on said collector region (16), and of forming both an insulation layer (28, 38) and a metal silicide film (22) on said non-monocrystalline silicon film (20); a third step of forming both a first base region (30) of a second conductivity type in said collector region (16) by using said non-monocrystalline silicon film (20) as a diffusion source of impurities, and a second base region (36) of the second conductivity type in the surface area of said collector region (16) and in contact with said first base region (30); and a fourth step of forming an emitter region (42) of the first conductivity type in the surface area of said second base region; characterized in that, said second step includes a first sub-step of forming said metal silicide film (22) which completely covers the upper surface of said non-monocrystalline silicon film (20), a second sub-step of patterning said metal silicide and non-monocrystalline silicon films (22, 20) to form an opening, a third sub-step of forming said insulation layer (28, 38) on the end surfaces of said metal silicide and non-monocrystalline silicon films (22, 20) which define said opening, and said fourth step includes a fourth sub-step of forming said emitter region (42) by using said insulation layer (28, 38), said non-monocrystalline silicon film (20), and said metal silicide film (22) as a mask.
Claim 8
Independent Claim
266 words
A method for producing a bipolar transistor comprising: a first step of forming a collector region (16) of a first conductivity type in the surface area of a semiconductor body (10, 12, 18); a second step of forming a non-monocrystalline silicon film (20) on said collector region (16), and of forming both an insulation layer (28, 38) and a metal silicide film (22) on said non-monocrystalline silicon film (20); a third step of forming both a first base region (30) of a second conductivity type in said collector region (16) by using said non-monocrystalline silicon film (20) as a diffusion source of impurities, and a second base region (36) of the second conductivity type in the surface area of said collector region (16) and in contact with said first base region (30); and a fourth step of forming an emitter region (42) of the first conductivity type in the surface area of said second base region; characterized in that, said second step includes a first sub-step of forming said metal silicide film (22) which completely covers the upper surface of said non-monocrystalline silicon film (20), a second sub-step of patterning said metal silicide and non-monocrystalline silicon films (22, 20) to form an opening, a third sub-step of forming said insulation layer (28, 38) on the end surfaces of said metal silicide and non-monocrystalline silicon films (22, 20) which define said opening, and said fourth step includes a fourth sub-step of forming said emitter region (42) by using said insulation layer (28, 38), said non-monocrystalline silicon film (20), and said metal silicide film (22) as a mask.
Claim 9
Dependent Claim
97 words
A method according to claim 6, characterized in that said second sub-step includes a fifth sub-step of exposing said non-monocrystalline silicon film (20) by etching a portion of said metal silicide film (22), and a sixth sub-step of oxidizing the exposed portion of said non-monocrystalline silicon film (20), thereby forming an insulative portion; said third step includes a seventh sub-step of ion-implanting impurities of the second conductivity type into said collector region (16) through said insulative portion, and an eighth sub-step of annealing the semiconductor structure after said seventh sub-step, thereby forming said second base region (36).
Claim 10
Dependent Claim
98 words
A method according to claim 6, characterized in that said second sub-step includes a fifth sub-step of exposing said collector region (16) by etching portions of said metal silicide film (22) and non-monocrystalline silicon film (20), and a sixth sub-step of forming an insulative portion on the exposed portion of said collector region (16); said third step includes a seventh sub-step of ion-implanting impurities of the second conductivity type into said collector region (16) through said insulative portion, and an eighth sub-step of annealing the semiconductor structure after said seventh sub-step, thereby forming said second base region (36).