Patent EP0168552A2 successfully refreshed from Google Patents.
EP0168552A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
MOS transistor ciruit with breakdown protection
Assignee: Toshiba Corp
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Filing: 1981-06-17
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Granted: —
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Expires: 2001-06-17
Abstract
Abstract A protected MOS transistor circuit includes a first input (or output) MOS transistor (1) and a protective circuit (10) including a second depletion mode MOS transistor (TrP) having a drain-source current path connected between ground and the gate of the MOS transistor and arranged to prevent breakdown of the gate oxide of the protected MOS transistor when power is off as a consequence of stray voltages when power is off. A substrate voltage generating circuit is arranged to generate a substrate bias voltage which is applied to the substrate of the second MOS transis- . tor when power is on so as to alter its threshold voltage, causing the transistor to become non-conductive.
Inventors
- 👤 Masamichi Asano
- 👤 Hiroshi Iwahashi
- 👤 Ichiro Kobayashi
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 17:47
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/003; H03K19/00315; H03K17/00; H03K17/08; H03K17/081; H03K17/0812; H03K17/08122; H03K19/0008; H03K19/0013; H03K19/0016; H10; H10D; H10D30/00; H10D30/60; H10D89/00; H10D89/60; H10D89/601
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
150 words
A protected MOS transistor circuit comprising a first MOS transistor (TrI) having a plurality of terminals; and having a region which is susceptible to damage caused by the accidental application of stray voltages to one of the terminals when power is off; characterised by protective means comprising a second depletion mode MOS transistor (Trp) having a source-drain current path connected between the said terminal and a reference voltage level and a substrate, said second MOS transistor having a threshold voltage that changes polarity as a voltage applied to said second transistor substrate is varied; and a substrate voltage generating circuit (20) for generating a substrate bias voltage which is applied to said substrate when power is on, said substrate bias-voltage having a suitable value to cause said threshold voltage to change so that said second transistor is conductive when power is off and is rendered non-conductive when power is on.
Claim 2
Dependent Claim
150 words
A protected MOS transistor circuit comprising a first MOS transistor (TrI) having a plurality of terminals; and having a region which is susceptible to damage caused by the accidental application of stray voltages to one of the terminals when power is off; characterised by protective means comprising a second depletion mode MOS transistor (Trp) having a source-drain current path connected between the said terminal and a reference voltage level and a substrate, said second MOS transistor having a threshold voltage that changes polarity as a voltage applied to said second transistor substrate is varied; and a substrate voltage generating circuit (20) for generating a substrate bias voltage which is applied to said substrate when power is on, said substrate bias-voltage having a suitable value to cause said threshold voltage to change so that said second transistor is conductive when power is off and is rendered non-conductive when power is on.
Claim 3
Dependent Claim
23 words
A protected MOS transistor circuit according to claim 1 in which the gate of said second transistor is connected to said reference voltage.
Claim 4
Dependent Claim
26 words
A protected MOS transistor circuit according to claim 1 in which said substrate bias voltage is also applied to the gate of said second NOS transistor.
Claim 5
Dependent Claim
28 words
A protected MOS transistor circuit according to claim 1 further comprising a control signal generating circuit (2) whose output is applied to the gate of'said second MOS transistor.
Claim 6
Dependent Claim
35 words
A protected MOS transistor circuit according to any preceding claim further comprising an oscillator circuit (21) for generating a signal to drive said substrate voltage generating circuit (20) and/or said control signal generating circuit (2).
Claim 7
Dependent Claim
57 words
A protected MOS transistor circuit according to any preceding claim in which the said second MOS transistor is an n channel device whose threshold voltage changes from negative to positive as said substrate voltage becomes more negative, and said substrate voltage generating circuit is adapted to generate a bias voltage which is negative when power is on.
Claim 8
Dependent Claim
60 words
A protected MOS transistor circuit according to any of claims 1 to 5 in which the said second MOS transistor is a p channel device whose threshold voltage changes from positive to negative as said substrate voltage becomes more positive, and said substrate voltage generating circuit is adapted to generate a bias voltage which is positive when power is on.
References Cited (Backward Citations)
No citation records indexed.
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