Personal computer having normal and high speed execution modes

Claim 1

A personal computer having a high speed microprocessor responsive to a mode select signal for executing in either a FAST mode or a SLOW mode, applications programs written for a slow speed microprocessor where the slow speed microprocessor is software compatible with said high speed microprocessor and includes an internal pre- fetch queue with a first number of of bytes of memory, said high speed microprocessor having an internal pre- fetch queue with a second number of bytes of memory, said first number of bytes of pre-fetch queue less than said second number of bytes of pre-fetch queue, said computer further including: (a) a RAM memory having each addressable memory word location characterized in that a-plurality of bytes; (b) a clock generator responsive to the mode select signal for generating the clocking signals to said high speed microprocessor such that (i) in the SLOW mode, the clocking frequency is the same as the normal clocking frequency for said slow microprocessor, and (ii) in the FAST mode, the clocking frequency is higher than the normal clocking frequency for the slow microprocessor; and (c) logic means responsive to the mode select signal and said clock generator for controlling the wait state of said high speed micrprocessor when in the SLOW speed mode so that every other word access to said RAM memory from said high speed microprocessor requires two consecutive word accesses to the same memory address to obtain the contents of the addressed location thereby enabling said high speed microprocessor to execute said application programs in the SLOW mode, on the average, at substantially the same speed as the program normally runs on said slow speed microprocessor.