System for controlling transfer of commands between processors

Assignee: Fujitsu Ltd

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Filing: 1985-06-28

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Granted: —

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Expires: 2005-06-28

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Abstract

Abstract A system for controlling transfer of commands between processors (11-14) of a multiprocessor system, including a single control unit (10) connected to all the processors by separate information transfer lines (15-18). The control unit (10) selects the processor generating a command transfer request signal in a predetermined priority order and receives the processor address from the selected processor. The receiving processor and predetermined transfer information are determined in accordance with the selected processor, the processor address, and the processor status information determined by the processor address. The predetermined transfer information is transferred to the receiving processor via an information transfer path established the selected processor and the receiving processor.

Inventors

👤 Aiichiro Inoue
👤 Katsumi Onishi
👤 Yuji Oinaga
👤 Kenichi Uerufueagurin-Tsurugamine 102 Nojima

Bibliographic Details

Application Number —

Jurisdiction EP

Data Source google_patents

Last Synchronized 2026-11-08 16:23

CPC Classifications

G; G06; G06F; G06F13/00; G06F15/00; G06F15/16; G06F15/163; G06F15/17

Claims Analysis

Total Claims: 4

Claim 1

Independent Claim 109 words

A system for controlling transfer of commands between processors of a multiprocessor system, comprising a single control unit connected to all of said processors by separate information transfer paths; means for selecting, in a predetermined priority order, the processor generating a command transfer request signal; means for receiving a processor address from the selected processor; means for determining the receiving processor and predetermined transfer information based on the selected processor, the processor address, and processor status information determined by the processor address; means for transferring said predetermined transfer information to said receiving processor; and means for establishing an information transfer path between the selected processor and said receiving processor.

Claim 2

Independent Claim 109 words

Claim 3

Dependent Claim 111 words

A system for controlling transfer of commands between processors according to claim 1, wherein each of said processors is provided with a command sending portion and a command receiving portion which are connected to said separate information transfer paths and are operable independently; said command sending portion being provided with means for sending said command transfer request signal, said processor address, and command information to said information transfer path and receiving response information from said information transfer path; and said command receiving portion being provided with means'for receiving said predetermined transfer information and said command information from said information transfer path and sending said response information to said information transfer path.

Claim 4

Dependent Claim 69 words

A system for controlling transfer of commands between processors according to claim 1, wherein command information and response information are formed by information having a predetermined length, said means for establishing the information transfer path between said selected processor and said receiving processor being constructed so as to hold said information transfer path only a set period determined by the length of said response information and said command information.

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