Standard cell LSIs

Claim 2

A semiconductor integrated circuit device, formed on the basis of standard cell methodology employing standard cells of different kinds each kind having a bulk pattern providing a predetermined set of circuit elements forming a respective unit circuit, in which a row of standard cells is provided, wherein the row includes two adjoining cells of two different kinds, the bulk pattern of each of those two different cell kinds including a pair of regions, for receiving respective power supply voltages, at one side of the cell, and wherein the two cells are disposed in the row so that their bulk patterns partially overlap so that they effectively share in common one such pair of regions.

Claim 3

A device as claimed in claim 1, wherein the row includes a third cell, the bulk pattern of whose cell kind also includes such a pair of regions, the third cell having such a pair of regions not shared with any other cell.

Claim 4

A device as claimed in claim 1 or 2, wherein the bulk pattern of one of the two different cell kinds is the mirror image of that of the other of those two different cell kinds.

Claim 7

A method as claimed in claim 4, wherein the first step includes providing information, for each of the plurality of cell kinds, indicating the said regions and indicating an allowable region of overlap with another cell kind.

Claim 8

A method as claimed in claim 4 or 5, wherein the first step includes providing the cell pattern of the said other of those cells by inverting the cell pattern of the said one of those cells.

Claim 9

A CAD system, for designing a semiconductor integrated circuit device on the basis of standard cell methodology employing standard cells of different kinds each kind corresponding to a bulk pattern providing a predetermined set of circuit elements forming a respective unit circuit in a fabricated semiconductor integrated circuit device, the system comprising a cell library, storing cell pattern information for a plurality of cell kinds, each cell kind having a cell pattern including a pair of regions corresponding to portions for receiving respective power supply voltages in a fabricated cell, a display, and means whereby an operator can call up, from the cell library, information concerning each cell kind, the system being operable so that the display shows a schematic of a cell of a called-up cell kind, and so that the operator can selectively position the schematic, on the display, the system being further operable so that the schematic includes an indication of the position of the said pair of regions and an indication of the extent to which the schematic can be overlapped with the schematic of another cell so that in a finished semiconductor integrated circuit device two cells corresponding to the overlapped schematics share in common such portions for receiving respective power supply voltages.

Claim 10

A CAD system, for designing a semiconductor integrated circuit device on the basis of standard cell methodology employing standard cells of different kinds each kind corresponding to a bulk pattern providing a predetermined set of circuit elements forming a respective unit circuit in a fabricated semiconductor integrated circuit device, the system comprising a cell library, storing cell pattern information for a plurality of cell kinds, each cell kind having a cell pattern including a pair of regions corresponding to portions for receiving respective power supply voltages in a fabricated cell, a display, and means whereby an operator can call up, from the cell library, information concerning each cell kind, the system being operable so that the display shows a schematic of a cell of a called-up cell kind, and so that the operator can selectively position the schematic, on the display, the system being further operable so that the schematic includes an indication of the position of the said pair of regions and an indication of the extent to which the schematic can be overlapped with the schematic of another cell so that in a finished semiconductor integrated circuit device two cells corresponding to the overlapped schematics share in common such portions for receiving respective power supply voltages.

Claim 11

A system as claimed in claim 7, operable to provide, from stored cell pattern information for one cell kind, a designation of another cell kind which has a cell pattern which is a mirror image of that of the one cell kind.