Patent EP0167249A2 successfully refreshed from Google Patents.
EP0167249A2
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EP
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Method of making a polysilicon resistor with low thermal activation energy
Assignee: Thorn EMI North America Inc
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Filing: 1985-05-14
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Granted: —
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Expires: 2005-05-14
Abstract
Abstract A method of fabricating a resistor in polysilicon and a semiconductor element suitable for use as a load resistor in a static memory. In the method, after the polysilicon has been doped, the device is annealed by exposing it to a rapid increase of ambient temperature (up to between 900 and 1200 DEG C), maintaining the high ambient temperature for a controlled time (about 5 seconds) and then lowering the ambient temperature at a rapid rate. This decreases resistance by one order of magnitude and significantly decreases the temperature activation energy of the resistor. This permits static memory cells to retain data even through the cell has high leakage currents, thereby improving final test yields.
Inventors
- 👤 Ronald R. Bourassa
- 👤 Douglas B. Butler
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-06 01:54
CPC Classifications
H; H10; H10B; H10B10/00; H10B10/15; H10P; H10P95/00; H10P95/90; H10D; H10D1/00; H10D1/40; H10D1/47; H10P14/00; H10P14/40; H10P14/416; H10P32/00; H10P32/30; H10P32/302; H10P34/00; H10P34/40; H10P34/42; H10P34/422; Y; Y10; Y10S; Y10S257/00; Y10S257/903; Y10S257/904
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
30 words
A method of fabricating a resistor in polysilicon comprising doping areas of a polysilicon structure with differing types of impurities, characterised in that after the doping, the structure is annealed.
Claim 2
Independent Claim
30 words
A method of fabricating a resistor in polysilicon comprising doping areas of a polysilicon structure with differing types of impurities, characterised in that after the doping, the structure is annealed.
Claim 3
Independent Claim
52 words
A method of fabricating a resistor, in polysilicon for a semiconductor integrated circuit, the method comprising forming a polysilicon structure having a first region wwith one type of doping impurity and a second region adjacent to said first region and having an electrically opposite doping impurity; and heat treating the po;ysilicon structure.
Claim 4
Independent Claim
52 words
A method of fabricating a resistor, in polysilicon for a semiconductor integrated circuit, the method comprising forming a polysilicon structure having a first region wwith one type of doping impurity and a second region adjacent to said first region and having an electrically opposite doping impurity; and heat treating the po;ysilicon structure.
Claim 5
Dependent Claim
25 words
A method as claimed in Claim 1 or 2, wherein said annealing or heat treatment step comprises rapidly heating the structure to a controlled temperature.
Claim 6
Independent Claim
40 words
A method as claimed in any preceding claim, wherein the annealing or heat treatment step further comprises maintaining the temperature at the structure at a high temperature for a controlled time, and then cooling the structure in a controlled fashion.
Claim 7
Independent Claim
31 words
A method as claimed in any preceding claim, comprising rapidly heating the structure, maintaining a high ambient temperature for a controlled duration, and then cooling the structure at a controlled rate.
Claim 8
Dependent Claim
22 words
A method as claimed in Claim 4 or 5, wherein said cooling step comprises reducing the heating power as rapidly as possible.
Claim 9
Independent Claim
47 words
A method as claimed in any preceding claim, comprising subjecting the structure to a rapid change in ambient temperature up to greater than 900° but less than 1200 0 C, maintaining the ambient temperature for about 5 seconds, and reducing the ambient temperature at a controlled rate.
Claim 10
Independent Claim
56 words
A method of fabricating a semiconductor element comprising the steps of superimposing on a silicon substrate a layer of oxide and a layer of polysilicon, doping the polysilicon with a first dopant of one conducting type, doping portions of the polysilicon with a second dopant of the other conducting type, and the annealing the semiconductor element.
Claim 11
Independent Claim
56 words
A method of fabricating a semiconductor element comprising the steps of superimposing on a silicon substrate a layer of oxide and a layer of polysilicon, doping the polysilicon with a first dopant of one conducting type, doping portions of the polysilicon with a second dopant of the other conducting type, and the annealing the semiconductor element.
Claim 12
Dependent Claim
13 words
A semiconductor element fabricated by a method as claimed in any preceding claim.
Claim 13
Dependent Claim
57 words
semiconductor element comprising a silicon substrate, superimposed layers of oxide and polysilicon on said substrate, said polysilicon having a first region doped with an impurity of one conductivity type and a second region doped with an impurity of the other conductivity type, said semiconductor element having been annealed after the doping of said first and second regions.
Claim 14
Dependent Claim
57 words
semiconductor element comprising a silicon substrate, superimposed layers of oxide and polysilicon on said substrate, said polysilicon having a first region doped with an impurity of one conductivity type and a second region doped with an impurity of the other conductivity type, said semiconductor element having been annealed after the doping of said first and second regions.
References Cited (Backward Citations)
No citation records indexed.
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