Patent EP0166141A2 successfully refreshed from Google Patents.
EP0166141A2
Expired / Lapsed
EP
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Method of forming dielectric isolation
Assignee: International Business Machines Corp
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Filing: 1985-05-10
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Granted: —
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Expires: 2005-05-10
Abstract
Abstract In a semiconductor substrate having a trench isolation pattern (18) formed therein, a method is taught for improving the planarity of the substrate and for improving the silicon nitride passivation at the trench peripheries. The quality of the trench edge is improved by providing for an undercut silicon dioxide layer (16) and a recessed silicon sidewall arrangement below the silicon nitride layers (14) resulting in better protection of the underlying Si0 2 and Si regions. In further processing, improved planarity between the polyimide-filled trench (18) and the adjacent substrate is achieved by establishing a polyimide etch-back point via a previously deposited oxide layer (21). Subsequent removal of the oxide (21) does not affect the polyimide (22); the top of said polyimide (22) being substantially planar with the adjacent substrate.
Inventors
- 👤 Chakrapani Gajanan Jambotkar
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 03:29
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/10; H10W10/17; H10D; H10D64/00; H10D64/01; H10D64/011; H10W10/01; H10W10/011; H10W10/014; H10W10/0145; H10W20/00; H10W20/01; H10W20/021; H10W20/071; H10W20/081
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
179 words
A method of forming dielectric isolation for an integrated circuit structure in a semiconductor substrate forming at least one trench (18) having sub- stantiall y vertical sidewalls and at least one contact in said substrate by etching while using a suitable mask pattern, and filling said trench (18) with dielectric material, characterized by anisotropically etching said semiconductor body which establishes said trench to undercut the overlying mask pattern; forming a first insulating layer (20) over the surfaces of said trench; forming a first passivating layer (15) over the trench surfaces and over said substrate thereby assuring a continuous passivating layer at the undercut of said mask; forming a second insulating layer (21) uniformly over the passivating layer (15); depositing a dielectric layer (22) over said second insulating layer (21) thereby filling the trench (18); uniformly etching said dielectric layer (22) to the level of said second insulating layer (21) in the contact areas, thereby leaving said dielectric layer (22) in the trench; and uniformly etching said second insulating layer (21) leaving said second layer only in the trench (18).
Claim 2
Independent Claim
179 words
A method of forming dielectric isolation for an integrated circuit structure in a semiconductor substrate forming at least one trench (18) having sub- stantiall y vertical sidewalls and at least one contact in said substrate by etching while using a suitable mask pattern, and filling said trench (18) with dielectric material, characterized by anisotropically etching said semiconductor body which establishes said trench to undercut the overlying mask pattern; forming a first insulating layer (20) over the surfaces of said trench; forming a first passivating layer (15) over the trench surfaces and over said substrate thereby assuring a continuous passivating layer at the undercut of said mask; forming a second insulating layer (21) uniformly over the passivating layer (15); depositing a dielectric layer (22) over said second insulating layer (21) thereby filling the trench (18); uniformly etching said dielectric layer (22) to the level of said second insulating layer (21) in the contact areas, thereby leaving said dielectric layer (22) in the trench; and uniformly etching said second insulating layer (21) leaving said second layer only in the trench (18).
Claim 3
Dependent Claim
24 words
The method as claimed in claim 1, characterized in that said mask pattern is a patterned layer of silicon nitride deposited on said substrate.
Claim 4
Dependent Claim
47 words
The method as claimed in claim 1, characterized in that said mask pattern comprises successive layers of identically patterned silicon dioxide and silicon nitride and wherein said anisotropic etching step is followed by isotropically etching said silicon dioxide layer to also undercut said silicon nitride mask layer.
Claim 5
Independent Claim
378 words
The method as claimed in claims 1 to 3, characterized by forming a first insulating layer (16) on the upper surface of the semiconductor substrate; forming a first passivating layer (14) over the first insulating layer (16); forming at least one opening in said first passivating layer (14) by etching the layer using a suitable mask pattern; forming at least one opening by etching in said first insulating layer (16) corresponding with said openings in first passivating layer (14) and having the same lateral dimension as the openings in the first passivating layer; forming at least one trench (18) in said substrate by etching said trench having substantially vertical sidewalls to the same lateral dimensions as the openings in said first passivating layer (14) and said first insulating layer (16); anisotropically etching said substrate to expand the sidewalls of said trench (18) such that the sidewalls are recessed from the overlying first passivating (14) and first insulating layers (16); isotropically etching said first insulating layer (16) to undercut said passivating layer (14) whereby the opening in said first insulating layer (16) is greater than the opening in said first passivating layer (14) and is substantially the same as the lateral dimensions of the expanded trench sidewalls; forming a thin second insulating layer (20) in the trench (18), said second layer coating all exposed trench surfaces to form a continuous layer with the undercut first insulating layer (16); conformally forming a continuous second passivating layer (15) over the first passivating layer (14) on the upper surface of the substrate and on the first and second insulating layers (16, 20) on the trench surfaces; forming a third insulating layer (21) uniformly over said second passivating layer (15) to a level in the contact region which is above the level of the top surface of the second passivating layer (15) on the upper surface of the substrate; forming a layer (22) of dielectric material over said third insulating layer (21) which overfills said trench (1,8); removing said dielectric layer (22) by etching said layer back to the level of the third insulating layer (21) in contact region thereby leaving the trench filled with said dielectric layer (22); and removing said third insulating layer (21) by etching uniformly in all non-trench areas.
Claim 6
Dependent Claim
54 words
The method as claimed in claim 4, characterized in that said formation of a continuous second passivating layer (15) is followed by the further steps of removing said second passivating layer (15) and said second insulating layer (20) in all horizontal directions; and, forming platinum silicide (30) on the silicon exposed by said removal.
Claim 7
Dependent Claim
106 words
The method as claimed in claim 4 or 5, further comprising the passivation and planarization steps of: forming a third passivating layer (29) over said dielectric layer (22) and said third insulating layer (21) in the trench region and over said second passivating layer (15) on the substrate; and removing said third passivating layer (29) from all surfaces to the level of the top of the dielectric layer (22) and the top of the second passivating layer (15) on the upper surface of the substrate whereby the deposited third insulating layer (21) remains below said level at the trench peripheries over the third insulating layer (21).
Claim 8
Independent Claim
34 words
The method as claimed in claims 1 to 6, characterized in that said semiconductor substrate is silicon, said insulating layer material is silicon dioxide and said passivating layer material is silicon nitride. ¡ ;
Claim 9
Independent Claim
18 words
The method as claimed in claims 1 to 7, characterized in that said dielectric layer material is polyimide.
References Cited (Backward Citations)
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