Patent EP0163795A2 successfully refreshed from Google Patents.
EP0163795A2
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EP
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A method and means for reducing signal propagation losses in very large scale integrated circuits
Assignee: Fairchild Semiconductor Corp
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Filing: 1984-12-12
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Granted: —
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Expires: 2004-12-12
Abstract
Abstract A method and means for reducing signal propagation losses in very large scale integrated circuits is provided comprising a ground plane located adjacent to, but insulated from, a conductive signal layer overlying an active region in a semiconductor substrate. While, the ground plane is preferrably disposed between the signal layer and the substrate, it may be disposed above the signal layer. Moreover, two or more signal layers may be employed and sandwiched between a pair of ground planes.
Inventors
- 👤 James M. Early
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 20:22
CPC Classifications
H; H10; H10W; H10W44/00; H10W44/20; H10W20/00; H10W20/40; H10W20/495; H10W44/203; H10W44/216
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
59 words
A semiconductor structure characterized by: a layer of semiconductor material having active devices formed therein; a first dielectric layer formed on said layer of semiconductor material; a conductive ground plane formed on said first dielectric layer; a second dielectric layer formed on said conductive ground plane; and at least one conductive signal path formed on said second dielectric layer.
Claim 2
Dependent Claim
59 words
A semiconductor structure characterized by: a layer of semiconductor material having active devices formed therein; a first dielectric layer formed on said layer of semiconductor material; a conductive ground plane formed on said first dielectric layer; a second dielectric layer formed on said conductive ground plane; and at least one conductive signal path formed on said second dielectric layer.
Claim 3
Dependent Claim
54 words
Structure as in claim 1 characterized in that said first dielectric layer includes at least one ground plane via for exposing a portion of said layer of semiconductor material and said conductive ground plane provides electrical connection to that portion of said layer of semiconductor material which is exposea by said ground plane via.
Claim 4
Dependent Claim
58 words
Structure as in claim 1 or 2 characterizea in that said first and second dielectric layer include at least one signal path via for exposing a portion of said layer of semiconductor material and said conductive signal path provides electrical connection to that portion of said layer of semiconductor material which is exposed by said signal path via.
Claim 5
Dependent Claim
59 words
A semiconductor structure characterizea by: a layer of semiconductor material having active devices formed therein; a first dielectric layer formed on said layer of semiconductor material; at least one conductive signal path formed on said first dielectric layer; a second dielectric layer formea on said conductive signal path; and a conductive ground plane formed on said second dielectric layer.
Claim 6
Dependent Claim
59 words
A semiconductor structure characterizea by: a layer of semiconductor material having active devices formed therein; a first dielectric layer formed on said layer of semiconductor material; at least one conductive signal path formed on said first dielectric layer; a second dielectric layer formea on said conductive signal path; and a conductive ground plane formed on said second dielectric layer.
Claim 7
Dependent Claim
55 words
A structure as in claim 4 characterized in that said first dielectric layer includes at least one signal path via for exposing a portion of said layer of semiconductor material and said conductive signal path provides electrical connection to that portion of said layer of semiconductor material which is exposed by said signal path via.
Claim 8
Dependent Claim
62 words
A structure as in claim 4 or 5 characterized in that said first and second dielectric layers and said signal path include at least one ground plane via for exposing a portion of said layer of semiconductor material and said ground plane provides electrical connection to that portion of said layer of semiconductor material which is exposed by said ground plane via.
Claim 9
Dependent Claim
34 words
A structure as in claim 1 or 4 characterized in that said first and said second dielectric layers comprise a material selected from the group of material consisting of silicon dioxide and silicon nitride.
Claim 10
Dependent Claim
35 words
A structure as in claim 1 or 4 characterized in that said first conductive layer is formed from a material selected from the group of materials consisting of aluminum, alloys of aluminum, and polycrystalline silicon.
Claim 11
Dependent Claim
35 words
A structure as in claim 1 or 4 characterized in that said second conductive layer is formed from a material selected from the group of materials consisting of aluminum, alloys of aluminum, and polycrystalline silicon.
Claim 12
Independent Claim
199 words
The method of forming a semiconductor device characterized by the steps of: forming active devices within a semiconductor substrate; forming a first dielectric layer on said semiconductor substrate; forming a first plurality of vias in said first dielectric layer thereby to expose a plurality of first selected portions of said semiconductor material; forming a first conductive layer on said first dielectric layer, said first conductive layer also being formed within said first plurality of vias thereby to provide electrical connection to said plurality of first selected portions of said semiconductor substrate which are exposed by said first plurality of vias; patterning said first conductive layer to form a second plurality of vias; forming a second dielectric layer on the surface of said first conductive layer; extending said second plurality of vias through said first dielectric layer and said second dielectric layer thereby to expose a plurality of second selected portions of said semiconductor substrate; ana forming a second conductive layer on said second dielectric layer and within said second plurality of vias, thereby providing electrical connection between said second conductive layer and said plurality of second selected portions of said semiconductor substrate exposed by said second plurality of vias.
Claim 13
Independent Claim
199 words
The method of forming a semiconductor device characterized by the steps of: forming active devices within a semiconductor substrate; forming a first dielectric layer on said semiconductor substrate; forming a first plurality of vias in said first dielectric layer thereby to expose a plurality of first selected portions of said semiconductor material; forming a first conductive layer on said first dielectric layer, said first conductive layer also being formed within said first plurality of vias thereby to provide electrical connection to said plurality of first selected portions of said semiconductor substrate which are exposed by said first plurality of vias; patterning said first conductive layer to form a second plurality of vias; forming a second dielectric layer on the surface of said first conductive layer; extending said second plurality of vias through said first dielectric layer and said second dielectric layer thereby to expose a plurality of second selected portions of said semiconductor substrate; ana forming a second conductive layer on said second dielectric layer and within said second plurality of vias, thereby providing electrical connection between said second conductive layer and said plurality of second selected portions of said semiconductor substrate exposed by said second plurality of vias.
Claim 14
Dependent Claim
44 words
The method as in claim 10 characterized in that said first conductive layer is patterned to provide a plurality of electrical interconnects and wherein said second conductive layer is substantially continuous over the surface of the semiconductor substrate thereby serving as a ground plane.
Claim 15
Dependent Claim
46 words
The method as in claim 10 or 11 characterized in that said first conauctive layer is substantially continuous over the surface of said semiconductor substrate thereby serving as a ground plane, and wherein said second conductive layer is patterned to provide a plurality of electrical interconnects.
Claim 16
Dependent Claim
35 words
The method as in claim 10, 11 or 12 characterized in that said first and said second dielectric layers comprise a material selected from the group of materials consisting of silicon dioxide and silicon nitride.
Claim 17
Dependent Claim
37 words
The method as in claim 10, 11, 12 or 13 characterized in that said first conductive layer is formed from a material selected from the group of materials consisting of aluminum, alloys of aluminum, and polycrystalline silicon.
Claim 18
Independent Claim
36 words
The method as in any one of claims 10-14 characterized in that said second conductive layer is formed from a material selected from the group of materials consisting of aluminum, alloys of aluminum, and polycrystalline silicon.
Claim 19
Dependent Claim
75 words
A semiconductor structure characterized by: a layer of semiconauctor material having active regions formed therein; a conductive grouna plane layer; a conductive interconnecting signal layer; a plurality of dielectric layers for electrically insulating said conductive layers from each other and said semiconductor material, each of said layers below the top layer thereof being provided with a means for permitting an electrical connection between each of said conductive layers and selected regions of said semiconductor material.
Claim 20
Dependent Claim
75 words
A semiconductor structure characterized by: a layer of semiconauctor material having active regions formed therein; a conductive grouna plane layer; a conductive interconnecting signal layer; a plurality of dielectric layers for electrically insulating said conductive layers from each other and said semiconductor material, each of said layers below the top layer thereof being provided with a means for permitting an electrical connection between each of said conductive layers and selected regions of said semiconductor material.
Claim 21
Dependent Claim
24 words
A semiconductor structure according to claim 16 characterized in that said ground plane layer is disposed between said signal layer and said semiconductor material.
Claim 22
Dependent Claim
47 words
A semiconductor structure according to claim 16 or 17 characterized in that said signal layer comprises a first and a second signal layer, said ground plane layer comprises a first and a second ground plane layer and said signal layers are disposed between said ground plane layers.
Claim 23
Dependent Claim
27 words
A semiconductor structure according to claim 16, 17 or 18 characterized in that said signal layer is disposed between said ground plane layer and said semiconductor material.
Claim 24
Independent Claim
73 words
A method of making a semiconductor structure characterized by the steps of: providing on a layer of semiconductor material having active regions formed therein, a conductive ground plane layer, a conductive interconnecting signal layer and a plurality of dielectric layers for electrically insulating said conauctive layers from each other and from said layer of semiconductor material; and electrically interconnecting each of said conducting layers to selected portions of said layer of semiconductor material.
Claim 25
Independent Claim
73 words
A method of making a semiconductor structure characterized by the steps of: providing on a layer of semiconductor material having active regions formed therein, a conductive ground plane layer, a conductive interconnecting signal layer and a plurality of dielectric layers for electrically insulating said conauctive layers from each other and from said layer of semiconductor material; and electrically interconnecting each of said conducting layers to selected portions of said layer of semiconductor material.
Claim 26
Dependent Claim
23 words
A method according to claim 20 characterized in that said ground plane layer is disposed between said signal layer and said semiconductor material.
Claim 27
Dependent Claim
46 words
A method according to claim 20 or 21 characterized in that said signal layer comprises a first and a second signal layer, said ground plane layer comprises a first and a second ground plane layer and said signal layers are disposed between said ground plane layers.
Claim 28
Dependent Claim
26 words
A method according to claim 20, 21 or 22 characterized in that said signal layer is disposed between said ground plane layer and said semiconauctor material.
References Cited (Backward Citations)
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