Patent EP0160525A2 successfully refreshed from Google Patents.
EP0160525A2
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EP
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A gate turn-off Thyristor and a method of producing the same
Assignee: Mitsubishi Electric Corp
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Filing: 1985-04-25
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Granted: —
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Expires: 2005-04-25
Abstract
Abstract A method of producing a gate turn-off thyristor comprising a first n type impurity region (24), a second p type impurity region (22), a third n type impurity region (21), and a fourth ptype impurity region (23) produced in a semiconductor substrate in the above-mentioned order from the side of the first main surface of the semiconductor substrate, a cathode electrode (7) provided in contact with the first n type impurity region (24), a gate electrode (6) provided in contact with the second p type impurity region (22), and an anode electrode (5) which short-circuits the third region (21) and the fourth region (23) at the second main surface of the semiconductor substrate, which method is characterised in that gold is diffused in the third region (21) at a predetermined diffusion temperature, thereby to shorten the life time of the third region.
Inventors
- 👤 Hiroyasu Hagino
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 05:58
CPC Classifications
H; H10; H10D; H10D18/00; H10D18/60; H10D62/00; H10D62/80; H10D62/83; H10D62/834; Y; Y10; Y10S; Y10S438/00; Y10S438/904
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
143 words
A method of producing a gate turn-off thyristor comprising a first n type impurity region (24), a second p type impurity region (22), a third n type impurity region (21), and a fourth p type impurity region (23) produced in a semiconductor substrate in the above-mentioned order from the side of the first main surface of the semiconductor substrate, a cathode electrode (7) provided in contact with the first n type impurity region (24), a gate electrode (6) provided in contact with the second p type impurity region (22), and an anode electrode (5) which short-circuits the third region (21) and the fourth region (23) at the second main surface of the semiconductor substrate, which method is characterised in that gold is diffused in the third region (21) at a predetermined diffusion temperature, thereby to shorten the life time of the third region.
Claim 2
Independent Claim
143 words
A method of producing a gate turn-off thyristor comprising a first n type impurity region (24), a second p type impurity region (22), a third n type impurity region (21), and a fourth p type impurity region (23) produced in a semiconductor substrate in the above-mentioned order from the side of the first main surface of the semiconductor substrate, a cathode electrode (7) provided in contact with the first n type impurity region (24), a gate electrode (6) provided in contact with the second p type impurity region (22), and an anode electrode (5) which short-circuits the third region (21) and the fourth region (23) at the second main surface of the semiconductor substrate, which method is characterised in that gold is diffused in the third region (21) at a predetermined diffusion temperature, thereby to shorten the life time of the third region.
Claim 3
Dependent Claim
35 words
A method of producing a gate turn-off thyristor as defined in claim 1, wherein the diffusion temperature is made 820 to 845°C in producing a GTO having the blocking voltage of 1000 to 2000 volt.
Claim 4
Dependent Claim
35 words
A method of producing a gate turn-off thyristor as defined in claim 1, wherein the diffusion temperature is made 800 to 830°C in producing a GTO having the blocking voltage of 2000 to 3000 volt.
Claim 5
Dependent Claim
37 words
A method of producing a gate turn-off thyristor as defined in claim 1, wherein the diffusion temperature is made 760 to 810 0 C in producing a GTO having the blocking voltage of 3000 to 5000 volt.
Claim 6
Dependent Claim
121 words
A gate turn-off thyristor comprising a first n type impurity region (24), a second p type impurity region (22), a third n type impurity region (21), and a fourth p type impurity region (23) produced in a semiconductor substrate in the above-mentioned order from the side of the first main surface of the semiconductor substrate, a cathode electrode (7) provided in contact with the first n type impurity region (24), a gate electrode (6) provided in contact with the second p type impurity region (22), and an anode electrode (5) which short-circuits the third region (21) and the fourth region (23) at the second main surface of the semiconductor substrate, characterised in that the third region (21) is doped with gold.
Claim 7
Dependent Claim
121 words
A gate turn-off thyristor comprising a first n type impurity region (24), a second p type impurity region (22), a third n type impurity region (21), and a fourth p type impurity region (23) produced in a semiconductor substrate in the above-mentioned order from the side of the first main surface of the semiconductor substrate, a cathode electrode (7) provided in contact with the first n type impurity region (24), a gate electrode (6) provided in contact with the second p type impurity region (22), and an anode electrode (5) which short-circuits the third region (21) and the fourth region (23) at the second main surface of the semiconductor substrate, characterised in that the third region (21) is doped with gold.
References Cited (Backward Citations)
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