Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
160 words
A digital graphic equalizer comprising: a) a pulse-sequence generator for producing a sequence of pulse signals; b) first digital signal processor means supplied with said sequence of pulse signals and filtering the sequence of said pulse signals; c) digital-to-analog converter means supplied with an output signal from said first digital signal processor means so as to produce a measuring noise; d) means for emanating said measuring noise in a listening environment; and e) means for detecting said measuring noise the frequency response of which is changed in said listening environment; characterized by f) analog-to-digital converter means supplied with said detected measuring noise and producing digital signals representing the amplitude of said detected measuring noise; g) second digital signal processor means supplied with the digital signals from said analog-to-digital converter means and producing a plurality of frequency-divided signals; and h) spectrum analyzer means for receiving said plurality of frequency-divided signals so as to analyze the frequency response of the detected noise.
Claim 2
Dependent Claim
160 words
A digital graphic equalizer comprising: a) a pulse-sequence generator for producing a sequence of pulse signals; b) first digital signal processor means supplied with said sequence of pulse signals and filtering the sequence of said pulse signals; c) digital-to-analog converter means supplied with an output signal from said first digital signal processor means so as to produce a measuring noise; d) means for emanating said measuring noise in a listening environment; and e) means for detecting said measuring noise the frequency response of which is changed in said listening environment; characterized by f) analog-to-digital converter means supplied with said detected measuring noise and producing digital signals representing the amplitude of said detected measuring noise; g) second digital signal processor means supplied with the digital signals from said analog-to-digital converter means and producing a plurality of frequency-divided signals; and h) spectrum analyzer means for receiving said plurality of frequency-divided signals so as to analyze the frequency response of the detected noise.
Claim 3
Dependent Claim
32 words
, 2. A digital graphic equalizer according to claim 1, in which said first digital signal processor means produces a measuring noise the frequency response of which equals to - 3 dB/oct..
Claim 4
Dependent Claim
17 words
A digital graphic equalizer according to claim 2, in which said measuring noise comprises a pink noise.
Claim 5
Dependent Claim
18 words
A digital graphic equalizer according to claim 3, in which said pulse-sequence generator comprises an M-sequence code generator.
Claim 6
Dependent Claim
20 words
A digital graphic equalizer according to claim 1, in which said digital signal processor means comprises a cascade-connected low-pass filters.
Claim 7
Dependent Claim
106 words
A digital graphic equalizer according to claim 5, in which each of said low-pass filters comprises an input adder having first and second input terminals and an output terminal, the first input terminal of which is supplied with the output of said M-sequence code generator; an output adder having first and second input terminals and an output terminal; and delay circuit means having an input terminal connected to the output terminal of said input adder and the first input terminal of said output adder, the output terminal of which is connected to the second terminals of-said input and output adders through first and second multipliers, respectively.
Claim 8
Dependent Claim
18 words
A digital graphic equalizer according to claim 1, in which said spectrum analyzer means includes a logarithmic compressor.
Claim 9
Dependent Claim
17 words
A digital graphic equalizer according to claim 1, further including a memory for storing said compensating characteristics.
Claim 10
Dependent Claim
17 words
A digital graphic equalizer according to claim 8, in which said memory comprises a random access memory.