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EP0155110A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Viterbi decoder comprising a majority circuit in producing a decoded signal

Assignee: NEC Corp
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Filing: 1985-02-26
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Granted: —
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Expires: 2005-02-26
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Abstract

Abstract In a Viterbi decoder for use in producing a decoded signal by correcting and decoding convolutional codes, a majority circuit (46) is connected to a path memory (45). At each of time slots for the respective convolutional codes, the majority circuit decides a decoded datum of the decoded signal by a majority of information bits memorized in the path memory as representative of survivor paths of a predetermined number of the time slots which include the above-mentioned each of the time slots as a latest one of the predetermined number of the time slots.

Inventors

  • 👤 Toshihara C/O Nec Corporation Yagi

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-26 21:49
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/37; H03M13/39; H03M13/41

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 109 words
A Viterbi decoder for use in producing a decoded signal by correcting and decoding convolutional codes in synchronism with a succession of time slots, the Viterbi decoder including a path memory (45) for memorizing, at each of the time slots, survivor paths in terms of information bits associated with the respective survivor paths of a predetermined number of the time slots which include said each of the time slots as a latest one of the predetermined number of the time slots, characterised by a majority circuit (46) for deciding a decoded datum of the decoded signal for each of the time slots by a majority of the information bits.
Claim 2
Dependent Claim 109 words
A Viterbi decoder for use in producing a decoded signal by correcting and decoding convolutional codes in synchronism with a succession of time slots, the Viterbi decoder including a path memory (45) for memorizing, at each of the time slots, survivor paths in terms of information bits associated with the respective survivor paths of a predetermined number of the time slots which include said each of the time slots as a latest one of the predetermined number of the time slots, characterised by a majority circuit (46) for deciding a decoded datum of the decoded signal for each of the time slots by a majority of the information bits.
Claim 3
Dependent Claim 32 words
A Viterbi decoder as claimed in claim 1, characterised in that the predetermined number of the time slots is equal to at least six times the constraint length of the convolutional codes.
Claim 4
Dependent Claim 34 words
A Viterbi decoder as claimed in claim 1 or 2, characterised in that the predetermined number of the time slots is selected between two and four times the constraint length of the convolutional codes.

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